- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98127 > SN74LVTH16541DL (TEXAS INSTRUMENTS INC) LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | SN74LVTH16541DL |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | LVT SERIES, DUAL 8-BIT DRIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | GREEN, PLASTIC, SSOP-48 |
| 文件頁數(shù)： | 1/13頁 |
| 文件大?。?/td> | 316K |
| 代理商： | SN74LVTH16541DL |
www.ti.com
FEATURES
SN54LVTH16541 . . . WD PACKAGE
SN74LVTH16541 . . . DGG OR DL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE1
1Y1
1Y2
GND
1Y3
1Y4
VCC
1Y5
1Y6
GND
1Y7
1Y8
2Y1
2Y2
GND
2Y3
2Y4
VCC
2Y5
2Y6
GND
2Y7
2Y8
2OE1
1OE2
1A1
1A2
GND
1A3
1A4
VCC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCC
2A5
2A6
GND
2A7
2A8
2OE2
DESCRIPTION/ORDERING INFORMATION
3.3-V ABT 16-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS691E – MAY 1997 – REVISED NOVEMBER 2006
Members of the Texas Instruments Widebus
Family
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V Operation
and Low Static-Power Dissipation
Support Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V VCC)
Support Unregulated Battery Operation Down
to 2.7 V
Typical V
OLP (Output Ground Bounce) <0.8 V
at VCC = 3.3 V, TA = 25°C
I
off and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Distributed V
CC and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB
Layout
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Package Options Include Plastic Shrink
Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package Using
25-mil Center-to-Center Spacings
These 16-bit buffers/drivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the
capability to provide a TTL interface to a 5-V system environment.
These devices are noninverting 16-bit buffers composed of two 8-bit sections with separate output-enable
signals. For either 8-bit buffer section, the two output-enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must
be low for the corresponding Y outputs to be active. If either output-enable input is high, the outputs of that 8-bit
buffer section are in the high-impedance state.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 1997–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LVTH16646DLR | LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| SN74LVTH16835DL | LVT SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| SN74LVTH16835DLG4 | LVT SERIES, 18-BIT DRIVER, TRUE OUTPUT, PDSO56 |
| SN74LVTH16952DLR | LVT SERIES, DUAL 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO56 |
| SN74LVTH182514DGG | LVT SERIES, 20-BIT BOUNDARY SCAN REG TRANSCEIVER, TRUE OUTPUT, PDSO64 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVTH16541DLG4 | 功能描述:緩沖器和線路驅(qū)動器 9-Bit Bus Transceiver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH16541DLR | 功能描述:緩沖器和線路驅(qū)動器 3.3V ABT 16-Bit Buff/Drv W/3-St Otpt RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74LVTH16543DGGR | 功能描述:總線收發(fā)器 16bit ABT RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LVTH16543DGGR | 制造商:Texas Instruments 功能描述:Transceiver Logic IC |
| SN74LVTH16543DGGRE4 | 制造商:Texas Instruments 功能描述:16-bit 3.3V transceiver,74LVTH16543DGG |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。