
SN54LVT639, SN74LVT639
3.3-V ABT OCTAL BUS TRANSCEIVERS
WITH 3-STATE (B PORT) AND OPEN-COLLECTOR (A PORT) OUTPUTS
SCBS475A – JUNE 1994 – REVISED JULY 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
A-Bus Outputs Are Open Collector;
B-Bus Outputs Are 3 State
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Bus-Hold Data Inputs (B Port) Eliminate the
Need for External Pullup Resistors
Support Live Insertion
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Ceramic (J) DIPs
description
These octal bus transceivers are designed
specifically for low-voltage (3.3-V) V
CC
operation,
but with the capability to provide a TTL interface
to a 5-V system environment.
These
′
LVT639 are designed for asynchronous communication between open-collector and 3-state buses.
These devices transmit data from the A bus (open collector) to the B bus (3 state) or from the B bus to the A
bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be
used to disable the device so the buses are effectively isolated.
Active bus-hold circuitry is provided on the B bus to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVT639 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVT639 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74LVT639 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1995, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54LVT639 . . . J PACKAGE
SN74LVT639 . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A
A
D
B
B
O
A
G
B
V
C
SN54LVT639 . . . FK PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P