參數(shù)資料
型號(hào): SN74LVCH16540ADGG
廠商: Texas Instruments, Inc.
英文描述: 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS
中文描述: 16位緩沖/驅(qū)動(dòng)器,三態(tài)輸出
文件頁(yè)數(shù): 1/9頁(yè)
文件大?。?/td> 139K
代理商: SN74LVCH16540ADGG
SN74LVCH16540A
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS569G – MARCH 1996 – REVISED JUNE 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
Power Off Disables Outputs, Permitting
Live Insertion
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin-Shrink
Small-Outline (DGG) Packages
description
This 16-bit buffer/driver is designed for 1.65-V to
3.6-V
V
CC
operation,
high-performance bus interface for wide data
paths.
and
provides
a
The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1 or OE2)
input is high, all corresponding outputs are in the high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVCH16540A is characterized for operation from –40
°
C to 85
°
C.
Copyright
1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
DGG OR DL PACKAGE
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1OE1
1Y1
1Y2
GND
1Y3
1Y4
V
CC
1Y5
1Y6
GND
1Y7
1Y8
2Y1
2Y2
GND
2Y3
2Y4
V
CC
2Y5
2Y6
GND
2Y7
2Y8
2OE1
1OE2
1A1
1A2
GND
1A3
1A4
V
CC
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
V
CC
2A5
2A6
GND
2A7
2A8
2OE2
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