參數(shù)資料
型號: SN74LVC543ADB
廠商: Texas Instruments, Inc.
英文描述: OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
中文描述: 登記收發(fā)器八路三態(tài)輸出
文件頁數(shù): 1/10頁
文件大?。?/td> 150K
代理商: SN74LVC543ADB
SN74LVC543A
OCTAL REGISTERED TRANSCEIVER
WITH 3-STATE OUTPUTS
SCAS299F – JANUARY 1993 – REVISED JUNE 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Power Off Disables Outputs, Permitting
Live Insertion
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages
description
This octal registered transceiver is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74LVC543A contains two sets of D-type latches for temporary storage of data flowing in either direction.
Separate latch-enable (LEAB or LEBA) and output-enable (OEAB or OEBA) inputs are provided for each
register to permit independent control in either direction of data flow.
The A-to-B enable (CEAB) input must be low to enter data from A or to output data from B. If CEAB is low and
LEAB is low, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB places the A
latches in the storage mode. With CEAB and OEAB both low, the 3-state B outputs are active and reflect the
data present at the output of the A latches. Data flow for B to A is similar to that of A to B, but uses CEBA, LEBA,
and OEBA.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN74LVC543A is characterized for operation from –40
°
C to 85
°
C.
Copyright
1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
DB, DW, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
LEBA
OEBA
A1
A2
A3
A4
A5
A6
A7
A8
CEAB
GND
V
CC
CEBA
B1
B2
B3
B4
B5
B6
B7
B8
LEAB
OEAB
相關(guān)PDF資料
PDF描述
SN74LVC543DB OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC543PW OCTAL REGISTERED TRANSCEIVER WITH 3-STATE OUTPUTS
SN74LVC544A Octal Registered Transceivers With 3-State Outputs(八記錄收發(fā)器(三態(tài)輸出))
SN74LVC646DB OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
SN74LVC646PW OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
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