參數(shù)資料
型號: SN74LVC2G02YEAR
廠商: Texas Instruments, Inc.
英文描述: DUAL 2 INPUT POSITIVE NOR GATE
中文描述: 陽性雙2輸入或非門
文件頁數(shù): 1/11頁
文件大?。?/td> 255K
代理商: SN74LVC2G02YEAR
SCES554A MARCH 2004 REVISED OCTOBER 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Available in the Texas Instruments
NanoStar
and NanoFree
Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 4 ns at 3.3 V
Low Power Consumption, 10-
μ
A Max I
CC
±
24-mA Output Drive at 3.3 V
Typical V
OLP
(Output Ground Bounce)
<0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
>2 V at V
CC
= 3.3 V, T
A
= 25
°
C
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
The SN74LVC2G38 is designed for 1.65-V to 5.5-V V
CC
operation.
This device is a dual two-input NAND buffer gate with open-drain outputs. It performs the Boolean function
Y = A
B or Y = A + B in positive logic.
NanoStar
and NanoFree
package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
NanoStar
WCSP (DSBGA)
0.23-mm Large Bump YEP
Reel of 3000
SN74LVC2G38YEPR
_ _ _D7_
40
°
C to 85
°
C
NanoFree
WCSP (DSBGA)
0.23-mm Large Bump YZP (Pb-free)
SN74LVC2G38YZPR
SSOP DCT
Reel of 3000
SN74LVC2G38DCTR
C38_ _ _
VSSOP DCU
Reel of 3000
SN74LVC2G38DCUR
C38_
Reel of 250
SN74LVC2G38DCUT
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb,
= Pb-free).
Copyright
2004, Texas Instruments Incorporated
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1A
1B
2Y
GND
V
CC
1Y
2B
2A
4
3
2
1
5
6
7
8
GND
2Y
1B
1A
2A
2B
1Y
V
CC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
NanoStar and NanoFree are trademarks of Texas Instruments.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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相關(guān)PDF資料
PDF描述
SN74LVC2G02YEPR DUAL 2 INPUT POSITIVE NOR GATE
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