參數(shù)資料
型號(hào): SN74LVC1G97YEAR
廠商: TEXAS INSTRUMENTS INC
元件分類: 標(biāo)準(zhǔn)邏輯
英文描述: SPECIALTY LOGIC CIRCUIT, BGA6
封裝: MO-211EA, DSBGA-6
文件頁數(shù): 1/17頁
文件大?。?/td> 498K
代理商: SN74LVC1G97YEAR
www.ti.com
FEATURES
3
2
4
6
1
In1
In2
Y
GND
In0
DBV PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
6
1
In1
In2
Y
GND
In0
3
2
4
6
1
In1
In2
Y
GND
In0
In1
In0
In2
Y
GND
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
6
VCC
5
VCC
5
DESCRIPTION/ORDERING INFORMATION
CONFIGURABLE MULTIPLE-FUNCTION GATE
SCES416I – DECEMBER 2002 – REVISED MARCH 2006
Available in the Texas Instruments
Latch-Up Performance Exceeds 100 mA Per
NanoStar and NanoFree Packages
JESD 78, Class II
Supports 5-V V
CC Operation
ESD Protection Exceeds JESD 22
Inputs Accept Voltages to 5.5 V
– 2000-V Human-Body Model (A114-A)
Max t
pd of 6.3 ns at 3.3 V
– 200-V Machine Model (A115-A)
Low Power Consumption, 10-
A Max I
CC
– 1000-V Charged-Device Model (C101)
±24-mA Output Drive at 3.3 V
Choose From Nine Specific Logic Functions
I
off Supports Partial-Power-Down Mode
Operation
This configurable multiple-function gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G97 features configurable multiple functions. The output state is determined by eight patterns of
3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All
inputs can be connected to VCC or GND.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar – WCSP (DSBGA)
SN74LVC1G97YEAR
0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)
SN74LVC1G97YZAR
0.17-mm Small Bump – YZA (Pb-free)
Tape and reel
_ _ _CS_
NanoStar – WCSP (DSBGA)
SN74LVC1G97YEPR
0.23-mm Large Bump – YEP
–40°C to 85°C
NanoFree – WCSP (DSBGA)
SN74LVC1G97YZPR
0.23-mm Large Bump – YZP (Pb-free)
SOT (SOT-23) – DBV
Tape and reel
SN74LVC1G97DBVR
C97_
SOT (SC-70) – DCK
Tape and reel
SN74LVC1G97DCKR
CS_
SOT (SOT-563) – DRL
Reel of 4000
SN74LVC1G97DRLR
CS_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA,YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2002–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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