參數(shù)資料
型號(hào)： SN74LVC1G38YEPR
廠商： Texas Instruments, Inc.
英文描述： SINGLE 2-INPUT NAND GATE WITH OPEN-DRAIN OUTPUT
中文描述： 單2輸入與非門(mén)為開(kāi)漏輸出
文件頁(yè)數(shù)： 1/16頁(yè)
文件大?。?/td> 408K
代理商： SN74LVC1G38YEPR
www.ti.com
FEATURES
Available in the Texas Instruments
NanoStar and NanoFree Packages
Supports 5-V V
CC
Operation
Inputs Accept Voltages to 5.5 V
Max t
pd
of 6.3 ns at 3.3 V
Low Power Consumption, 10-
μ
A Max I
CC
±24-mA Output Drive at 3.3 V
In2
3
2
4
6
1
In1
In2
Y
GND
In0
DBV PACKAGE
(TOP VIEW)
YEA, YEP, YZA,
OR YZP PACKAGE
(BOTTOM VIEW)
DCK PACKAGE
(TOP VIEW)
3
2
4
6
1
In1
In2
Y
GND
In0
3
2
4
6
1
In1
Y
GND
In0
In1
In0
In2
Y
V
CC
GND
DRL PACKAGE
(TOP VIEW)
See mechanical drawings for dimensions.
1
4
2
3
6
V
CC
V
CC
V
CC
5
5
5
5
DESCRIPTION/ORDERING INFORMATION
This configurable multiple-function gate is designed for 1.65-V to 5.5-V V
CC
operation.
The SN74LVC1G98 features configurable multiple functions. The output state is determined by eight patterns of
3-bit input. The user can choose the logic functions MUX, AND, OR, NAND, NOR, inverter, and noninverter. All
inputs can be connected to V
CC
or GND.
SN74LVC1G98
CONFIGURABLE MULTIPLE-FUNCTION GATE
SCES417H–DECEMBER 2002–REVISED JUNE 2005
I
off
Supports Partial-Power-Down Mode
Operation
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
(2)
NanoStar – WCSP (DSBGA)
0.17-mm Small Bump – YEA
NanoFree – WCSP (DSBGA)
0.17-mm Small Bump – YZA (Pb-free)
NanoStar – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74LVC1G98YEAR
SN74LVC1G98YZAR
Reel of 3000
_ _ _CW_
SN74LVC1G98YEPR
–40°C to 85°C
SN74LVC1G98YZPR
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
Reel of 4000
SN74LVC1G98DBVR
SN74LVC1G98DBVT
SN74LVC1G98DCKR
SN74LVC1G98DCKT
SN74LVC1G98DRLR
SOT (SOT-23) – DBV
C98_
SOT (SC-70) – DCK
CW_
SOT (SOT-553) – DRL
CW_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,
= Pb-free).
(2)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2002–2005, Texas Instruments Incorporated
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