參數(shù)資料
型號(hào): SN74LVC1G373YEPR
廠商: Texas Instruments, Inc.
英文描述: SINGLE D-TYPE LATCH
中文描述: 單一的D型鎖存
文件頁數(shù): 4/16頁
文件大?。?/td> 408K
代理商: SN74LVC1G373YEPR
www.ti.com
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
Recommended Operating Conditions
(1)
SN74LVC1G98
CONFIGURABLE MULTIPLE-FUNCTION GATE
SCES417H–DECEMBER 2002–REVISED JUNE 2005
MIN
–0.5
–0.5
–0.5
–0.5
MAX
6.5
6.5
6.5
UNIT
V
V
V
V
mA
mA
mA
mA
V
CC
V
I
V
O
V
O
I
IK
I
OK
I
O
Supply voltage range
Input voltage range
(2)
Voltage range applied to any output in the high-impedance or power-off state
(2)(3)
Voltage range applied to any output in the high or low state
Input clamp current
Output clamp current
Continuous output current
Continuous current through V
CC
or GND
V
CC
+ 0.5
V
I
< 0
V
O
< 0
–50
–50
±50
±100
165
259
142
143
123
150
DBV package
DCK package
DRL package
YEA/YZA package
YEP/YZP package
θ
JA
Package thermal impedance
(4)
°C/W
T
stg
Storage temperature range
–65
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
The value of V
is provided in the recommended operating conditions table.
The package thermal impedance is calculated in accordance with JESD 51-7.
(2)
(3)
(4)
MIN
1.65
1.5
MAX
5.5
UNIT
Operating
Data retention only
V
CC
Supply voltage
V
V
I
V
O
Input voltage
Output voltage
0
0
5.5
V
CC
–4
–8
–16
–24
–32
V
V
V
CC
= 1.65 V
V
CC
= 2.3 V
I
OH
High-level output current
mA
V
CC
= 3 V
V
CC
= 4.5 V
V
CC
= 1.65 V
V
CC
= 2.3 V
4
8
I
OL
Low-level output current
16
24
32
85
mA
V
CC
= 3 V
V
CC
= 4.5 V
T
A
Operating free-air temperature
–40
°C
(1)
All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
4
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