參數(shù)資料
型號: SN74LVC16T245GQLR
廠商: Texas Instruments, Inc.
英文描述: 16 BIT DUAL SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3 STATE OUTPUTS
中文描述: 16位雙電源總線收發(fā)器可配置電壓轉(zhuǎn)換和3態(tài)輸出
文件頁數(shù): 1/17頁
文件大小: 327K
代理商: SN74LVC16T245GQLR
SN74LVC16T245
16BIT DUALSUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3STATE OUTPUTS
SCES585 JULY 2004
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D Control Inputs VIH/VIL Levels are
Referenced to VCCA Voltage
D VCC Isolation Feature If Either VCC Input
Is at GND, Both Ports Are in the
High-Impedance State
D Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
D Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
D Ioff Supports Partial-Power-Down Mode
Operation
description/ordering information
This 16-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The
A port is designed to track VCCA. VCCA accepts
any supply voltage from 1.65 V to 5.5 V. The B port
is designed to track VCCB. VCCB accepts any
supply voltage from 1.65 V to 5.5 V. This allows for
universal low-voltage bidirectional translation
between any of the 1.8-V, 2.5-V, 3.3-V, and 5-V
voltage nodes.
The
SN74LVC16T245
is
designed
for
asynchronous communication between data
buses. The device transmits data from the A bus
to the B bus or from the B bus to the A bus,
depending
on
the
logic
level
at
the
direction-control (DIR) input. The output-enable
(OE) input can be used to disable the outputs so
the buses are effectively isolated.
The SN74LVC16T245 is designed so that the
control pins (1DIR, 2DIR, 1OE, and 2OE) are
supplied by VCCA.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
TSSOP DGG
Tape and reel
SN74LVC16T245DGGR
40
°C to 85°C
TVSOP DGV
Tape and reel
SN74LVC16T245DGVR
40 C to 85 C
VFBGA GQL
Tape and reel
SN74LVC16T245GQLR
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
PRODUCT
PREVIEW
DGG OR DGV PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1DIR
1B1
1B2
GND
1B3
1B4
VCCB
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
VCCB
2B5
2B6
GND
2B7
2B8
2DIR
1OE
1A1
1A2
GND
1A3
1A4
VCCA
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
VCCA
2A5
2A6
GND
2A7
2A8
2OE
Copyright
2004, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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