參數(shù)資料
型號(hào): SN74LVC16240
廠商: Texas Instruments, Inc.
英文描述: 16-Bit Buffers/Drivers With 3-State Outputs(16位緩沖器/驅(qū)動(dòng)器(三態(tài)輸出))
中文描述: 16位緩沖器/驅(qū)動(dòng)器與3態(tài)輸出(16位緩沖器/驅(qū)動(dòng)器(三態(tài)輸出))
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 100K
代理商: SN74LVC16240
SN74LVC16240
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS312A – NOVEMBER 1993 – REVISED JULY 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Supports Mixed-Mode Signal Operation on
All Ports (5-V Input/Output Voltage With
3.3-V V
CC
)
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
description
This 16-bit buffer/driver is designed for 2.7-V to
3.6-V V
CC
operation; it can interface to a 5-V
system environment.
The SN74LVC16240 is designed specifically to
improve both the performance and density of
3-state memory address drivers, clock drivers,
and bus-oriented receivers and transmitters.
The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. This device provides inverting
outputs and symmetrical active-low output-enable (OE) inputs.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74LVC16240 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
L
L
L
H
H
X
Z
Copyright
1995, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
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16
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20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1OE
1Y1
1Y2
GND
1Y3
1Y4
V
CC
2Y1
2Y2
GND
2Y3
2Y4
3Y1
3Y2
GND
3Y3
3Y4
V
CC
4Y1
4Y2
GND
4Y3
4Y4
4OE
2OE
1A1
1A2
GND
1A3
1A4
V
CC
2A1
2A2
GND
2A3
2A4
3A1
3A2
GND
3A3
3A4
V
CC
4A1
4A2
GND
4A3
4A4
3OE
DGG OR DL PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P
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