- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365639 > SN74LVC138ADB (Texas Instruments, Inc.) CAP .0047UF 200V B SERIES POLY PDF資料下載
參數(shù)資料
| 型號： | SN74LVC138ADB |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | CAP .0047UF 200V B SERIES POLY |
| 中文描述： | 3線至8線解碼器/解復用器 |
| 文件頁數(shù)： | 1/9頁 |
| 文件大?。?/td> | 144K |
| 代理商： | SN74LVC138ADB |
SN54LVC138A, SN74LVC138A
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCAS291I – MARCH 1993 – REVISED OCTOBER 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
= 3.3 V, T
A
= 25
°
C
Inputs Accept Voltages to 5.5 V
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK) and
Flat (W) Package, and DIPs (J)
description
The SN54LVC138A 3-line to 8-line decoder/
demultiplexer is designed for 2.7-V to 3.6-V V
CC
operation and the SN74LVC138A 3-line to 8-line
decoder/demultiplexer is designed for 1.65-V to
3.6-V V
CC
operation.
The ’LVC138A devices are designed for high-
performance memory-decoding or data-routing
applications requiring very short propagation
delay times. In high-performance memory systems, these decoders minimize the effects of system decoding.
When employed with high-speed memories utilizing a fast enable circuit, the delay times of these decoders and
the enable time of the memory are usually less than the typical access time of the memory. This means that
the effective system delay introduced by the decoders is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low enable inputs and one active-high enable input reduce the need for external gates or inverters when
expanding. A 24-line decoder can be implemented without external inverters and a 32-line decoder requires
only one inverter. An enable input can be used as a data input for demultiplexing applications.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
The SN54LVC138A is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74LVC138A is characterized for operation from –40
°
C to 85
°
C.
Copyright
1998, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC is a trademark of Texas Instruments Incorporated.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54LVC138A . . . J OR W PACKAGE
SN74LVC138A . . . D, DB, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
N
Y
Y
V
Y
Y
G
N
SN54LVC138A . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
相關PDF資料 |
PDF描述 |
|---|---|
| SN54LVC138AJ | Monolithic WFR, Binary Counter; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LVC138AW | Monolithic WFR, Binary Counter; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| SN54LVC574AJ | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN74LVC574ADB | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54LVC574AFK | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVC138ADBR | 功能描述:編碼器、解碼器、復用器和解復用器 Line Decoder RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADBRE4 | 功能描述:編碼器、解碼器、復用器和解復用器 3-Line to 8-Line Decoder/Demltplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADBRG4 | 功能描述:編碼器、解碼器、復用器和解復用器 3 Ln To 8 Ln Decodr Demultplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADE4 | 功能描述:編碼器、解碼器、復用器和解復用器 3-Line to 8-Line Decoder/Demltplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
| SN74LVC138ADG4 | 功能描述:編碼器、解碼器、復用器和解復用器 3-Line to 8-Line Decoder/Demltplxr RoHS:否 制造商:Micrel 產(chǎn)品:Multiplexers 邏輯系列:CMOS 位數(shù): 線路數(shù)量（輸入/輸出）:2 / 12 傳播延遲時間:350 ps, 400 ps 電源電壓-最大:2.625 V, 3.6 V 電源電壓-最小:2.375 V, 3 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:QFN-44 封裝:Tray |
發(fā)布緊急采購，3分鐘左右您將得到回復。