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參數(shù)資料
| 型號： | SN74LVC00ADRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 門電路 |
| 英文描述： | LVC/LCX/Z SERIES, QUAD 2-INPUT NAND GATE, PDSO14 |
| 封裝： | GREEN, PLASTIC, MS-012AB, SOIC-14 |
| 文件頁數(shù)： | 1/24頁 |
| 文件大?。?/td> | 920K |
| 代理商： | SN74LVC00ADRG4 |
www.ti.com
FEATURES
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
1Y
2A
2B
2Y
GND
VCC
4B
4A
4Y
3B
3A
3Y
SN54LVC00A . . . J OR W PACKAGE
SN74LVC00A . . . D, DB, NS, OR PW PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3B
1Y
NC
2A
NC
2B
1B
1A
NC
3Y
3A
V
4B
2Y
GND
NC
SN54LVC00A . . . FK PACKAGE
(TOP VIEW)
CC
NC - No internal connection
SN74LVC00A . . . RGY PACKAGE
(TOP VIEW)
1
14
7
8
2
3
4
5
6
13
12
11
10
9
4B
4A
4Y
3B
3A
1B
1Y
2A
2B
2Y
1A
3Y
V
GND
CC
DESCRIPTION/ORDERING INFORMATION
SN54LVC00A, SN74LVC00A
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCAS279P – JANUARY 1993 – REVISED JULY 2005
Operate From 1.65 V to 3.6 V
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Specified From –40
°C to 85°C, –40°C to 125°C,
and –55
°C to 125°C
ESD Protection Exceeds JESD 22
Inputs Accept Voltages to 5.5 V
– 2000-V Human-Body Model (A114-A)
Max t
pd of 4.3 ns at 3.3 V
– 200-V Machine Model (A115-A)
Typical V
OLP (Output Ground Bounce)
– 1000-V Charged-Device Model (C101)
<0.8 V at V
CC = 3.3 V, TA = 25°C
xxxxxx
Typical V
OHV (Output VOH Undershoot)
>2 V at V
CC = 3.3 V, TA = 25°C
The SN54LVC00A quadruple 2-input positive-NAND gate is designed for 2.7-V to 3.6-V VCC operation, and the
SN74LVC00A quadruple 2-input positive-NAND gate is designed for 1.65-V to 3.6-V VCC operation.
The 'LVC00A devices perform the Boolean function Y = A
B or Y = A + B in positive logic.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators
in a mixed 3.3-V/5-V system environment.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright 1993–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
On products compliant to MIL-PRF-38535, all parameters are
Instruments standard warranty. Production processing does not
tested unless otherwise noted. On all other products, production
necessarily include testing of all parameters.
processing does not necessarily include testing of all parameters.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LVC00ADT | 功能描述:邏輯門 Low-Pwr Sngl 2-Input Positive-NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC00ADTE4 | 功能描述:邏輯門 Low-Pwr Sngl 2-Input Positive-NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC00ADTG4 | 功能描述:邏輯門 Quad 2 Input Pos NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC00AMPWREP | 功能描述:邏輯門 Mil Enhance Quad 2 Input Pos-NAND Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74LVC00AMPWREPG4 | 功能描述:邏輯門 EP Quad 2-Input Pos- Nand Gate RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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