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參數(shù)資料
| 型號： | SN74LV166APWT |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 8-BIT PARALLEL-LOAD SHIFT REGISTERS |
| 中文描述： | 8位并行，負(fù)載移位寄存器 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 385K |
| 代理商： | SN74LV166APWT |
SCLS456B FEBRUARY 2001 REVISED DECEMBER 2004
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The ’LV166A parallel-in or serial-in, serial-out registers feature gated clock (CLK, CLK INH) inputs and an
overriding clear (CLR) input. The parallel-in or serial-in modes are established by the shift/load (SH/LD) input.
When high, SH/LD enables the serial (SER) data input and couples the eight flip-flops for serial shifting with each
clock (CLK) pulse. When low, the parallel (broadside) data inputs are enabled, and synchronous loading occurs
on the next clock pulse. During parallel loading, serial data flow is inhibited. Clocking is accomplished on the
low-to-high-level edge of CLK through a 2-input positive-NOR gate, permitting one input to be used as a
clock-enable or clock-inhibit function. Holding either CLK or CLK INH high inhibits clocking; holding either low
enables the other clock input. This allows the system clock to be free running, and the register can be stopped
on command with the other clock input. CLK INH should be changed to the high level only when CLK is high.
CLR overrides all other inputs, including CLK, and resets all flip-flops to zero.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
INPUTS
OUTPUTS
INTERNAL
CLR
SH/LD
CLK INH
CLK
SER
PARALLEL
A . . . H
QA
QB
QH
L
X
X
X
X
X
L
L
L
H
X
L
L
↑
↑
↑
↑
X
X
QA0
a
QB0
b
QH0
h
H
L
L
X
a . . . h
H
H
L
H
X
H
QAn
QAn
QB0
QGn
QGn
QH0
H
H
L
L
X
L
H
X
H
X
X
QA0
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LV166APWTE4 | 功能描述:計數(shù)器移位寄存器 8-Bit Parallel-Load Shift Register RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV166APWTG4 | 功能描述:計數(shù)器移位寄存器 Parallel Load 8B Shift Registers RoHS:否 制造商:Texas Instruments 計數(shù)器類型: 計數(shù)順序:Serial to Serial/Parallel 電路數(shù)量:1 封裝 / 箱體:SOIC-20 Wide 邏輯系列: 邏輯類型: 輸入線路數(shù)量:1 輸出類型:Open Drain 傳播延遲時間:650 ns 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝:Reel |
| SN74LV174AD | 功能描述:觸發(fā)器 Hex w/ Clear RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LV174ADBR | 功能描述:觸發(fā)器 Hex D-Type Flip-Flop With Clear RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74LV174ADBRE4 | 功能描述:觸發(fā)器 Hex D-Type Flip-Flop With Clear RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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