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| 型號(hào)： | SN74LS242JD |
| 英文描述： | 4-Bit Bus Transceiver |
| 中文描述： | 4位總線收發(fā)器 |
| 文件頁數(shù)： | 1/8頁 |
| 文件大?。?/td> | 163K |
| 代理商： | SN74LS242JD |
TL/F/6417
5
T
June 1989
54LS257A/DM54LS257B/DM74LS257B,
54LS258A/DM54LS258B/DM74LS258B
TRI-STATE
é
Quad 2-Data Selectors/Multiplexers
General Description
These Schottky-clamped high-performance multiplexers
feature TRI-STATE outputs that can interface directly with
data lines of bus-organized systems. With all but one of the
common outputs disabled (at a high impedance state), the
low impedance of the single enabled output will drive the
bus line to a high or low logic level. To minimize the possibil-
ity that two outputs will attempt to take a common bus to
opposite logic levels, the output enable circuitry is designed
such that the output disable times are shorter than the out-
put enable times.
This TRI-STATE output feature means that n-bit (paralleled)
data selectors with up to 258 sources can be implemented
for data buses. It also permits the use of standard TTL reg-
isters for data retention throughout the system.
Features
Y
TRI-STATE versions LS157 and LS158 with same pin-
outs
Y
Schottky-clamped for significant improvement in A-C
performance
Y
Provides bus interface from multiple sources in high-
performance systems
Y
Average propagation delay from data input 12 ns
Y
Typical power dissipation
LS257B
LS258B
50 mW
35 mW
military/aerospace
Y
Alternate
54LS258A) are available. Contact a National Semicon-
ductor Sales Office/Distributor for specifications.
devices
(54LS257A/
Connection Diagrams
Dual-In-Line Package
TL/F/6417–1
Order Number 54LS257ADMQB, 54LS257AFMQB,
54LS257ALMQB, DM54LS257BJ, DM54LS257BW,
DM74LS257BM or DM74LS257BN
M16A, N16E or W16A
Dual-In-Line Package
TL/F/6417–2
Order Number 54LS258ADMQB, 54LS258AFMQB,
54LS258ALMQB, DM54LS258BJ, DM54LS258BW,
DM74LS258BM or DM74LS258BN
See NS Package Number E20A, J16A,
M16A, N16E or W16A
Function Table
Inputs
Output Y
Output
Control
Select
A
B
LS257
LS258
H
L
L
L
L
X
L
L
H
H
X
L
H
X
X
X
X
X
L
H
Z
L
H
L
H
Z
H
L
H
L
H
e
High Level, L
e
Low Level, X
e
Don’t Care,
Z
e
High Impedance (off)
TRI-STATE
é
is a registered trademark of National Semiconductor Corporation.
C
1995 National Semiconductor Corporation
RRD-B30M105/Printed in U. S. A.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LS242ND | 4-Bit Bus Transceiver |
| SN74LS243DR2 | 4-Bit Bus Transceiver |
| SN74LS243JD | 4-Bit Bus Transceiver |
| SN74LS258AD | 2-Input Digital Multiplexer |
| SN74LS258ADR2 | 2-Input Digital Multiplexer |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS242M | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS242MEL | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS242N | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74LS243D | 功能描述:總線收發(fā)器 Quad bus transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
| SN74LS243DE4 | 功能描述:總線收發(fā)器 Quad bus transceiver RoHS:否 制造商:Fairchild Semiconductor 邏輯類型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel |
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