- 您現(xiàn)在的位置：買(mǎi)賣(mài)IC網(wǎng) > PDF目錄374868 > SN74LS166N (ON SEMICONDUCTOR) Demonstration circuit board for MGA-655T6 PDF資料下載
參數(shù)資料
| 型號(hào)： | SN74LS166N |
| 廠(chǎng)商： | ON SEMICONDUCTOR |
| 元件分類(lèi)： | 通用總線(xiàn)功能 |
| 英文描述： | Demonstration circuit board for MGA-655T6 |
| 中文描述： | LS SERIES, 8-BIT RIGHT PARALLEL IN SERIAL OUT SHIFT REGISTER, TRUE OUTPUT, PDIP16 |
| 封裝： | PLASTIC, DIP-16 |
| 文件頁(yè)數(shù)： | 1/8頁(yè) |
| 文件大?。?/td> | 131K |
| 代理商： | SN74LS166N |
Semiconductor Components Industries, LLC, 1999
December, 1999 – Rev. 6
1
Publication Order Number:
SN74LS166/D
The SN74LS166 is an 8-Bit Shift Register. Designed with all inputs
buffered, the drive requirements are lowered to one 74LS standard
load. By utilizing input clamping diodes, switching transients are
minimized and system design simplified.
The LS166 is a parallel-in or serial-in, serial-out shift register and
has a complexity of 77 equivalent gates with gated clock inputs and an
overriding clear input. The shift/load input establishes the parallel-in
or serial-in mode. When high, this input enables the serial data input
and couples the eight flip-flops for serial shifting with each clock
pulse. Synchronous loading occurs on the next clock pulse when this is
low and the parallel data inputs are enabled. Serial data flow is
inhibited during parallel loading. Clocking is done on the low-to-high
level edge of the clock pulse via a two input positive NOR gate, which
permits one input to be used as a clock enable or clock inhibit function.
Clocking is inhibited when either of the clock inputs are held high,
holding either input low enables the other clock input. This will allow
the system clock to be free running and the register stopped on
command with the other clock input. A change from low-to-high on
the clock inhibit input should only be done when the clock input is
high. A buffered direct clear input overrides all other inputs, including
the clock, and sets all flip-flops to zero.
Synchronous Load
Direct Overriding Clear
Parallel to Serial Conversion
GUARANTEED OPERATING RANGES
Symbol
Parameter
Min
Typ
Max
Unit
V
CC
Supply Voltage
4.75
5.0
5.25
V
T
A
Operating Ambient
Temperature Range
0
25
70
°
C
I
OH
Output Current – High
–0.4
mA
I
OL
Output Current – Low
8.0
mA
LOW
POWER
SCHOTTKY
Device
Package
Shipping
ORDERING INFORMATION
SN74LS166N
16 Pin DIP
2000 Units/Box
SN74LS166D
16 Pin
SOIC
D SUFFIX
CASE 751B
http://onsemi.com
2500/Tape & Reel
PLASTIC
N SUFFIX
CASE 648
16
1
16
1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SN74LS174 | Cascadable Silicon Bipolar MMIC Ampifier |
| SN74LS174D | Demonstration circuit board for HSMP-3816 and HSMP-3866 |
| SN74LS174N | RF Switching Pin Diode in Surface Mount SOD-323 Package |
| SN74LS175 | Quad Pin Diode Pi Attenuator in SOT-25 Package |
| SN74LS175D | 750MHz - 1GHz 1/2 Watt High Linearity Amplifier |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74LS166ND | 制造商:Motorola Inc 功能描述: |
| SN74LS168N | 制造商:Motorola Inc 功能描述:IC,COUNTER,UP/DOWN,DECADE,LS-TTL,DIP,16PIN,PLASTIC |
| SN74LS169BD | 功能描述:計(jì)數(shù)器 IC Synch 4-Bit Up/Down Binary Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS169BDE4 | 功能描述:計(jì)數(shù)器 IC Synch 4-Bit Up/Down Binary Counter RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
| SN74LS169BDG4 | 功能描述:計(jì)數(shù)器 IC Sync 4B Up Down Binary Counters RoHS:否 制造商:NXP Semiconductors 計(jì)數(shù)器類(lèi)型:Binary Counters 邏輯系列:74LV 位數(shù):10 計(jì)數(shù)法: 計(jì)數(shù)順序: 工作電源電壓:1 V to 5.5 V 工作溫度范圍:- 40 C to + 125 C 封裝 / 箱體:SOT-109 封裝:Reel |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。