A
EN(2)
B
Control
Circuit
VG(1)
(1) Gate voltage (VG) is approximately equal to VCC + VT when the switch is ON
and VI > VCC + VT.
(2) EN is the internal enable signal applied to the switch.
SCDS119B – JANUARY 2003 – REVISED AUGUST 2012
SIMPLIFIED SCHEMATIC, EACH FET SWITCH (SW)
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
Supply voltage range(2)
–0.5
7
V
VIN
Control input voltage range(2) (3)
–0.5
7
V
VI/O
Switch I/O voltage range(2) (3) (4)
–0.5
7
V
IIK
Control input clamp current
VIN < 0
–50
mA
II/OK
I/O port clamp current
VI/O < 0
–50
mA
II/O
ON-state switch current(5)
±128
mA
Continuous current through VCC or GND
±100
mA
DCT package
220
θJA
Package thermal impedance(6)
°C/W
DCU package
227
Tstg
Storage temperature range
–65
150
°C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2)
All voltages are with respect to ground, unless otherwise specified.
(3)
The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(4)
VI and VO are used to denote specific conditions for VI/O.
(5)
II and IO are used to denote specific conditions for II/O.
(6)
The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
(1)
MIN
MAX
UNIT
VCC
Supply voltage
2.3
3.6
V
VCC = 2.3 V to 2.7 V
1.7
5.5
VIH
High-level control input voltage
V
VCC = 2.7 V to 3.6 V
2
5.5
VCC = 2.3 V to 2.7 V
0
0.7
VIL
Low-level control input voltage
V
VCC = 2.7 V to 3.6 V
0
0.8
VI/O
Data input/output voltage
0
5.5
V
TA
Operating free-air temperature
–40
85
°C
(1)
All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright 2003–2012, Texas Instruments Incorporated
3