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參數(shù)資料
| 型號： | SN74BCT8374ADWR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Replaced by BQ20Z80A-V110 : Impedance Track (TM) 1% accurate Gas Gauge for LiIon batteries SBS1.1 compliant 38-TSSOP -40 to 85 |
| 中文描述： | 掃描測試設(shè)備與八路D型邊沿觸發(fā)觸發(fā)器 |
| 文件頁數(shù)： | 5/26頁 |
| 文件大?。?/td> | 474K |
| 代理商： | SN74BCT8374ADWR |
SN54BCT8374A, SN74BCT8374A
SCAN TEST DEVICES
WITH OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS
SCBS045E – JUNE 1990 – REVISED JULY 1996
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
test architecture
Serial-test information is conveyed by means of a 4-wire test bus, or TAP, that conforms to IEEE Standard
1149.1-1990. Test instructions, test data, and test control signals all are passed along this serial-test bus. The
TAP controller monitors two signals from the test bus, TCK and TMS. The TAP controller extracts the
synchronization (TCK) and state control (TMS) signals from the test bus and generates the appropriate on-chip
control signals for the test structures in the device. Figure 1 shows the TAP-controller state diagram.
The TAP controller is fully synchronous to the TCK signal. Input data is captured on the rising edge of TCK, and
output data changes on the falling edge of TCK. This scheme ensures that data to be captured is valid for fully
one-half of the TCK cycle.
The functional block diagram shows the IEEE Standard 1149.1-1990 4-wire test bus and boundary-scan
architecture and the relationship among the test bus, the TAP controller, and the test registers. As shown, the
device contains an 8-bit instruction register and three test-data registers: an 18-bit boundary-scan register, a
2-bit boundary-control register, and a 1-bit bypass register.
Test-Logic-Reset
Run-Test/Idle
Select-DR-Scan
Capture-DR
Shift-DR
Exit1-DR
Pause-DR
Update-DR
TMS = L
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
TMS = L
TMS = H
TMS = L
Exit2-DR
Select-IR-Scan
Capture-IR
Shift-IR
Exit1-IR
Pause-IR
Update-IR
TMS = L
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
Exit2-IR
TMS = L
TMS = H
TMS = H
TMS = H
TMS = L
TMS = H
TMS = L
TMS = H
TMS = H
TMS = H
TMS = L
Figure 1. TAP-Controller State Diagram
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PDF描述 |
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| SN74BCT8374ADWRE4 | Replaced by BQ20Z80A-V110 : Impedance Track (TM) 1% accurate Gas Gauge for LiIon batteries SBS1.1 compliant 38-TSSOP -40 to 85 |
| SN74CBT16210DGV | 20-BIT FET BUS SWITCH |
| SN74CBT16210DGG | 20-BIT FET BUS SWITCH |
| SN74CBT16232DGG | SYNCHRONOUS 16-BIT 1-OF-2 FET MULTIPLEXER/DEMULTIPLEXER |
| SN74CBT1G125DBV | SINGLE FET BUS SWITCH |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74BCT8374ADWRE4 | 功能描述:特定功能邏輯 Fixed LDO Volt Reg RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8374ADWRG4 | 功能描述:特定功能邏輯 Scan Test Device RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8374ANT | 功能描述:觸發(fā)器 Device w/Octal D-Typ Edge-Trig Flip-Flop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74BCT8374ANTE4 | 功能描述:特定功能邏輯 Device w/Octal D-Typ Edge-Trig Flip-Flop RoHS:否 制造商:Texas Instruments 產(chǎn)品: 系列:SN74ABTH18502A 工作電源電壓:5 V 封裝 / 箱體:LQFP-64 封裝:Tube |
| SN74BCT8374NT | 制造商:Texas Instruments 功能描述:Flip Flop, Octal, D Type, 24 Pin, Plastic, DIP |
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