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參數(shù)資料
| 型號(hào)： | SN74BCT2574 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal Edge-Triggered D-Typt Flip-Flops With 3-State Outputs(八邊沿D觸發(fā)器(三態(tài)輸出)) |
| 中文描述： | 八路邊沿觸發(fā)D - Typt翻轉(zhuǎn)與3正反器態(tài)輸出（八邊沿?觸發(fā)器（三態(tài)輸出）） |
| 文件頁(yè)數(shù)： | 1/5頁(yè) |
| 文件大?。?/td> | 94K |
| 代理商： | SN74BCT2574 |
SN74BCT2574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCBS255 – SEPTEMBER 1991 – REVISED NOVEMBER 1993
Copyright
1993, Texas Instruments Incorporated
2–1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art BiCMOS Design
Significantly Reduces I
CCZ
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Output Ports Have Equivalent 33-
Series
Resistors, So No External Resistors Are
Required
Package Options Include Plastic
Small-Outline (DW) Packages and Standard
Plastic 300-mil DIPs (N)
description
This octal edge-triggered D-type flip-flop features 3-state outputs designed specifically for driving highly
capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O
ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up
at the data (D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without need for interface or pullup components.
The output enable (OE) does not affect the internal operations of the flip-flops. Old data can be retained or new
data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to source or sink up to 12 mA, include 33-
series resistors to reduce overshoot
and undershoot.
The SN74BCT2574 is characterized for operation from 0
°
C to 70
°
C.
FUNCTION TABLE
(each flip-flop)
INPUTS
OUTPUT
Q
OE
CLK
D
L
↑
↑
L
H
H
L
L
L
L
X
Q0
Z
H
X
X
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1D
2D
3D
4D
5D
6D
7D
8D
GND
V
CC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
DW OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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