參數(shù)資料
型號: SN74AVCA406GQCR
廠商: Texas Instruments, Inc.
英文描述: MMC SD CARD MEMORY STICK SMARTMEDIA AND XD PICTURE CARD 15KV ESD PROTECTED VOLTAGE TRANSLATION TRANSCEIVER
中文描述: MMC中記憶棒SD卡SmartMedia和xD圖像卡15KV靜電保護電壓轉換收發(fā)器
文件頁數(shù): 19/51頁
文件大?。?/td> 1435K
代理商: SN74AVCA406GQCR
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SCES615B – OCTOBER 2004 – REVISED DECEMBER 2004
19
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Table 7. Memory Stick
PIN
NO.
PIN
NAME
SIGNAL NAME
OR
(CONNECTION)
PIN FUNCTION
PIN
TYPE
A1
VCCA
10A1
VCCA
SCLK.h
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Clock signal from host
Power
B1
Input
C1
9A
BS.h
Bus state connected to host
I/O
D1
9DIR
(tie-high)
Direction control for 9A/9B connected to host. Tie high to make 9A an input, 9B an output.
Input
E1
78DIR
(tie-high)
Direction control for 7A/7B and 8A/8B. Not used in this mode. Tie to VCCA.
I/O pin not used in this mode. Tie to GND.
Input
F1
7A
(tie-low)
I/O
G1
VCCA
2A
VCCA
DATA1.h
A-port supply voltage. VCCA powers all A-port I/Os and control inputs.
Data bit 2 connected to host. Referenced to VCCA.
Data bit 3 connected to host. Referenced to VCCA.
Clock feedback to host for resynchronizing data. Used in OMAP processors. Optional on
other processors. Leave unconnected if not used.
Power
A2
I/O
B2
3A
DATA2.h
I/O
C2
10A2
SCLK-f.h
Output
D2
4A
DATA3.h
Data bit 4 connected to host. Referenced to VCCA.
I/O pin not used in this mode. Tie to GND.
I/O
E2
6A
(tie-low)
I/O
F2
8A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
G2
5A
(tie-low)
I/O pin not used in this mode. Tie to GND.
I/O
A3
4DIR
DATU-dir.h
Direction control for 4A/4B
Input
B3
1A
DATA0.h
Data bit 1 connected to host. Referenced to VCCA.
I/O
C3
Depopulated ball
D3
56DIR
(tie-high)
Direction control for 5A/5B and 6A/6B. Not used in this mode. Tie to VCCA.
Ground
Input
E3
GND
GND
F3
12A
DNU
Output pin not used in this mode. Do not use. Leave unconnected.
Output
G3
11A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
A4
2DIR
DATU-dir.h
Direction control for 2A/2B connected to host
Input
B4
1DIR
DAT0-dir.h
Direction control for 1A/1B connected to host
Input
C4
3DIR
DATU-dir.h
Direction control for 3A/3B connected to host
Input
D4
GND
GND
Ground
E4
CS0
CS0.h
Card select from host. Active low. When CS0 = high, 1A, 2A, 3A, 4A, 1B, 2B, 3B, 4B, 9A,
9B1, and 10A2 are placed in Hi Z and 10B1 is low.
Input
F4
13A
(tie-low)
Input pin not used in this mode. Tie to GND.
Input
G4
CS1
(tie-high)
Card select signal. Not used in this mode. Tie to VCCA for proper operation.
Input
A5
MODE1
(tie-low)
MODE1, MODE0 determine mode of operation (see Table 1). Tie to GND in this mode.
Input
B5
MODE0
(tie-low)
Input
C5
GND
GND
Ground
D5
4B
DATA3
Data bit 4 connected to card. Referenced to VCCB0.
Ground
I/O
E5
GND
GND
F5
7B
DNU
I/O pin not used in this mode. Leave unconnected.
I/O
G5
8B
DNU
I/O pin not used in this mode. Leave unconnected.
I/O
A6
10B1
SCLK
Clock signal connected to card
Output
B6
9B1
BS
Bus state signal connected to card
Output
C6
2B
DATA1
Data bit 2 connected to card. Referenced to VCCB0.
I/O
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