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參數(shù)資料
| 型號： | SN74AVC16374DGV |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH 3-STATE OUTPUTS |
| 中文描述： | 16位邊沿觸發(fā)的D -型觸發(fā)器具有三態(tài)輸出 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 167K |
| 代理商： | SN74AVC16374DGV |
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
SN74AVC16374
16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH 3-STATE OUTPUTS
SCES158F – DECEMBER 1998 – REVISED FEBRUARY 2000
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
DOC
(Dynamic Output Control) Circuit
Dynamically Changes Output Impedance,
Resulting in Noise Reduction Without
Speed Degradation
Dynamic Drive Capability Is Equivalent to
Standard Outputs With I
OH
and I
OL
of
±
24 mA at 2.5-V V
CC
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
I
off
Supports Partial-Power-Down Mode
Operation
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and Thin Very
Small-Outline (DGV) Packages
description
A Dynamic Output Control (DOC) circuit is implemented, which, during the transition, initially lowers the output
impedance to effectively drive the load and, subsequently, raises the impedance to reduce noise. Figure 1
shows typical V
OL
vs I
OL
and V
OH
vs I
OH
curves to illustrate the output impedance and drive capability of the
circuit. At the beginning of the signal transition, the DOC circuit provides a maximum dynamic drive that is
equivalent to a high-drive standard-output device. For more information, refer to the TI application reports, AVC
Logic Family Technology and Applications literature number SCEA006, and Dynamic Output Control (DOC
)
Circuitry Technology and Applications literature number SCEA009.
136
–128
–144
–160
0.4
0.8
1.2
1.6
2.0
2.4
2.8
170
153
119
102
85
68
51
34
17
0
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
TA = 25
°
C
Process = Nominal
IOL – Output Current – mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
–
O
V
TA = 25
°
C
Process = Nominal
IOH – Output Current – mA
VCC = 3.3 V
VCC = 2.5 V
VCC = 1.8 V
–
O
V
–80
–96
–112
–32
–48
–64
0
–16
Figure 1. Output Voltage vs Output Current
This 16-bit edge-triggered D-type flip-flop is operational at 1.2-V to 3.6-V V
CC
, but is designed specifically for
1.65-V to 3.6-V V
CC
operation.
Copyright
2000, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
DOC, EPIC, and Widebus are trademarks of Texas Instruments Incorporated.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74AVC16374DGVR | 功能描述:觸發(fā)器 16bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74AVC16374GQLR | 功能描述:觸發(fā)器 16bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74AVC16374ZQLR | 功能描述:觸發(fā)器 16B Edge Trgrd DType FlipFlop RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
| SN74AVC16646D | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN74AVC16646DGG | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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