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參數(shù)資料
| 型號： | SN74AUC2G00YEPR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL 2-INPUT POSITIVE-NAND GATE |
| 中文描述： | 雙2輸入陽性與非門 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大?。?/td> | 259K |
| 代理商： | SN74AUC2G00YEPR |
www.ti.com
FEATURES
Available in the Texas Instruments
NanoStar and NanoFree Packages
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
I
off
Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max t
pd
of 1.8 ns at 1.8 V
Low Power Consumption, 10
μ
A at 1.8 V
±
8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DCT OR DCU PACKAGE
(TOP VIEW)
1
2
3
4
8
7
6
5
1A
1B
2Y
GND
V
CC
1Y
2B
2A
4
3
2
1
5
6
7
8
GND
2Y
1B
1A
2A
2B
1Y
V
CC
YEP OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
This dual 2-input positive-NOR gate is operational at 0.8-V to 2.7-V V
CC
, but is designed specifically for 1.65-V to
1.95-V V
CC
operation.
The SN74AUC2G02 performs the Boolean function Y = A + B or Y = A
B in positive logic.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
SN74AUC2G02
DUAL 2-INPUT POSITIVE-NOR GATE
SCES441A–MAY 2003–REVISED MARCH 2005
This device is fully specified for partial-power-down applications using I
. The I
circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
T
A
PACKAGE
(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
(2)
NanoStar – WCSP (DSBGA)
0.23-mm Large Bump – YEP
NanoFree – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SSOP – DCT
VSSOP – DCU
Tape and reel
SN74AUC2G02YEPR
_ _ _UB_
Tape and reel
SN74AUC2G02YZPR
–40
°
C to 85
°
C
Tape and reel
Tape and reel
SN74AUC2G02DCTR
SN74AUC2G02DCUR
U02_
U02_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site.
(2)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2003–2005, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74AUC2G00YZPR | 功能描述:邏輯門 DUAL2Inpt+NANDGt RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUC2G00YZPRB | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| SN74AUC2G00YZTR | 制造商:Rochester Electronics LLC 功能描述: 制造商:Texas Instruments 功能描述: |
| SN74AUC2G02DCTR | 功能描述:邏輯門 DUAL 2-INPUT Pos- NOR GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
| SN74AUC2G02DCTRE4 | 功能描述:邏輯門 DUAL 2Input Pos NOR GATE RoHS:否 制造商:Texas Instruments 產(chǎn)品:OR 邏輯系列:LVC 柵極數(shù)量:2 線路數(shù)量（輸入/輸出）:2 / 1 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 傳播延遲時間:3.8 ns 電源電壓-最大:5.5 V 電源電壓-最小:1.65 V 最大工作溫度:+ 125 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DCU-8 封裝:Reel |
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