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參數(shù)資料
| 型號： | SN74ALVCH373GQNR |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS |
| 中文描述： | 八路透明D類鎖存器三態(tài)輸出 |
| 文件頁數(shù)： | 1/12頁 |
| 文件大小： | 215K |
| 代理商： | SN74ALVCH373GQNR |
SCES116G JULY 1997 REVISED AUGUST 2003
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Operates From 1.65 V to 3.6 V
Max t
pd
of 3.3 ns at 3.3 V
±
24-mA Output Drive at 3.3 V
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
description/ordering information
This octal transparent D-type latch is designed for 1.65-V to 3.6-V V
CC
operation.
The SN74ALVCH373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus
drivers, and working registers. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.
When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive
the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus
lines without interface or pullup components.
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
ORDERING INFORMATION
TA
PACKAGE
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
SOIC DW
Tube
SN74ALVCH373DW
ALVCH373
Tape and reel
SN74ALVCH373DWR
40
°
C to 85
°
C
TSSOP PW
Tape and reel
SN74ALVCH373PWR
VB373
TVSOP DGV
Tape and reel
SN74ALVCH373DGVR
VB373
VFBGA GQN
VFBGA ZQN (Pb-free)
Tape and reel
SN74ALVCH373GQNR
SN74ALVCH373ZQNR
VB373
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Copyright
2003, Texas Instruments Incorporated
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Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
DGV, DW, OR PW PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
OE
1Q
1D
2D
2Q
3Q
3D
4D
4Q
GND
V
CC
8Q
8D
7D
7Q
6Q
6D
5D
5Q
LE
相關PDF資料 |
PDF描述 |
|---|---|
| SN74ALVCH373DGV | OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS |
| SN74ALVCH373PW | OCTAL TRANSPARENT D-TYPE LATCH WITH 3-STATE OUTPUTS |
| SN74ALVCHR162282 | 18-Bit To 36-Bit Registered Bus Exchangers(18-36記錄總線交換器(三態(tài)輸出)) |
| SN74ALVCHR16245DGG | 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS |
| SN74ALVCHR16245DL | 16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ALVCH373PWR | 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74ALVCH373PWRE4 | 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74ALVCH373PWRG4 | 功能描述:閉鎖 Tri-St Octal D-Type RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74ALVCH373ZQNR | 功能描述:閉鎖 Octal TRANPNT DType Latch RoHS:否 制造商:Micrel 電路數(shù)量:1 邏輯類型:CMOS 邏輯系列:TTL 極性:Non-Inverting 輸出線路數(shù)量:9 高電平輸出電流: 低電平輸出電流: 傳播延遲時間: 電源電壓-最大:12 V 電源電壓-最小:5 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:SOIC-16 封裝:Reel |
| SN74ALVCH374DBR | 功能描述:觸發(fā)器 Octal Pos-Edge-Trig D-Type F-F RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel |
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