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參數(shù)資料
| 型號(hào)： | SN74ALVCH16973DLR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 總線收發(fā)器 |
| 英文描述： | ALVC/VCX/A SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO48 |
| 封裝： | GREEN, PLASTIC, SSOP-48 |
| 文件頁數(shù)： | 1/16頁 |
| 文件大?。?/td> | 333K |
| 代理商： | SN74ALVCH16973DLR |
www.ti.com
FEATURES
DESCRIPTION/ORDERING INFORMATION
DGG, DGV, OR DL PACKAGE
(TOP VIEW)
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TOE
D1
A1
GND
Y1
A2
VCC
D2
A3
GND
Y2
A4
D3
A5
GND
Y3
A6
VCC
D4
A7
GND
A8
Y4
LE
DIR
B1
Q1
GND
B2
Q2
VCC
B3
Q3
GND
B4
Q4
B5
Q5
GND
B6
Q6
VCC
B7
Q7
GND
Q8
B8
LOE
SN74ALVCH16973
8-BIT BUS TRANSCEIVER AND TRANSPARENT D-TYPE LATCH
WITH FOUR INDEPENDENT BUFFERS
SCES435B – APRIL 2003 – REVISED SEPTEMBER 2004
Member of the Texas Instruments Widebus
Family
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This device contains four independent noninverting
buffers and an 8-bit noninverting bus transceiver and
D-type latch, designed for 1.65-V to 3.6-V VCC
operation.
The SN74ALVCH16973 is particularly suitable for
demultiplexing an address/data bus into a dedicated
address bus and dedicated data bus. The device is
used where there is asynchronous bidirectional
communication between the A and B data bus, and
the address signals are latched and buffered on the
Q bus. The control-function implementation minimizes
external timing requirements.
This device can be used as one 4-bit buffer, one 8-bit
transceiver,
or
one
8-bit
latch.
It
allows
data
transmission from the A bus to the B bus or from the
B bus to the A bus, depending on the logic level at
the direction-control (DIR) input. The transceiver
output-enable (TOE) input can be used to disable the
transceivers so that the A and B buses effectively are
isolated.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
Tube
SN74ALVCH16973DL
SSOP - DL
ALVCH16973
Tape and reel
SN74ALVCH16973DLR
-40
°C to 85°C
TSSOP - DGG
Tape and reel
SN74ALVCH16973DGGR
ALVCH16973
TVSOP - DGV
Tape and reel
SN74ALVCH16973DGVR
VH973
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright 2003–2004, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN74ALVCH244DGVR | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Tri-State Octal RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74ALVCH244DW | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Tri-State Octal RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74ALVCH244DWE4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Octal Buffer/Driver With 3-State Outputs RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74ALVCH244DWG4 | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Octal Buffer Driver RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
| SN74ALVCH244DWR | 功能描述:緩沖器和線路驅(qū)動(dòng)器 Tri-State Octal RoHS:否 制造商:Micrel 輸入線路數(shù)量:1 輸出線路數(shù)量:2 極性:Non-Inverting 電源電壓-最大:+/- 5.5 V 電源電壓-最小:+/- 2.37 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Reel |
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