參數(shù)資料
型號(hào)： SN74ALVCH16272
廠商： Texas Instruments, Inc.
英文描述： 12-Bit TO 24-Bit Multiplexed Bus Exchanger(12-24多路復(fù)用總線交換器(三態(tài)輸出))
中文描述： 12位到24位復(fù)用總線交換（12-24多路復(fù)用總線交換器（三態(tài)輸出））
文件頁(yè)數(shù)： 1/6頁(yè)
文件大?。?/td> 117K
代理商： SN74ALVCH16272
SN74ALVCH16272
12-BIT TO 24-BIT MULTIPLEXED BUS EXCHANGER
WITH 3-STATE OUTPUTS
SCES057B – OCTOBER 1995 – REVISED JANUARY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
EPIC
(Enhanced-Performance Implanted
CMOS) Submicron Process
Bus Hold on Data Inputs Eliminates
the Need for External Pullup/Pulldown
Resistors
Packaged in Plastic Shrink Small-Outline
(DL) and Thin Shrink Small-Outline (DGG)
Packages
description
This 12-bit to 24-bit bus exchanger is designed for
2.3-V to 3.3-V V
CC
operation.
The SN74ALVCH16272 is intended for applica-
tions where two separate datapaths must be
multiplexed onto, or demultiplexed from, a single
datapath. This device is particularly suitable as an
interface between conventional DRAMs and
high-speed microprocessors.
Data from the A inputs is stored in the internal
registers on the low-to-high transition of the clock
(CLK) input, when the CLKENA inputs are low. A
two-stage pipeline is provided in each of the
A-to-1B and A-to-2B paths to serve as a shallow
write buffer.
Transparent latches are provided in the B-to-A
path to allow asynchronous operation to maximize
memory access throughput. These latches
transfer data when the latch-enable (LE) inputs
are low. The select (SEL) line selects 1B or 2B
data for the A outputs. Data flow is controlled by
the active-low output enables (OEA, OEB).
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH16272 is available in TI’s shrink small-outline (DL) and thin shrink small-outline (DGG)
packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the
same printed circuit board area.
The SN74ALVCH16272 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1997, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
DGG OR DL PACKAGE
(TOP VIEW)
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OEA
LE1B
2B3
GND
2B2
2B1
V
CC
A1
A2
A3
GND
A4
A5
A6
A7
A8
A9
GND
A10
A11
A12
V
CC
1B1
1B2
GND
1B3
LE2B
SEL
OEB
CLKENA2
2B4
GND
2B5
2B6
V
CC
2B7
2B8
2B9
GND
2B10
2B11
2B12
1B12
1B11
1B10
GND
1B9
1B8
1B7
V
CC
1B6
1B5
GND
1B4
CLKENA1
CLK
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
P
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參數(shù)描述
SN74ALVCH162721DGG 制造商:Texas Instruments 功能描述:
SN74ALVCH162721DL 功能描述:觸發(fā)器 3.3V 20bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74ALVCH162721DLR 功能描述:觸發(fā)器 3.3V 20bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74ALVCH162721GR 功能描述:觸發(fā)器 3.3V 20bit RoHS:否 制造商:Texas Instruments 電路數(shù)量:2 邏輯系列:SN74 邏輯類型:D-Type Flip-Flop 極性:Inverting, Non-Inverting 輸入類型:CMOS 輸出類型: 傳播延遲時(shí)間:4.4 ns 高電平輸出電流:- 16 mA 低電平輸出電流:16 mA 電源電壓-最大:5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:X2SON-8 封裝:Reel
SN74ALVCH162820DGG 制造商:Rochester Electronics LLC 功能描述:- Bulk
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