參數(shù)資料
型號: SN74ALVC10PW
廠商: Texas Instruments, Inc.
英文描述: TRIPLE 3-INPUT POSITIVE-NAND GATE
中文描述: 三重3輸入陽性與非門
文件頁數(shù): 2/7頁
文件大小: 110K
代理商: SN74ALVC10PW
SN74ALVC10
TRIPLE 3-INPUT POSITIVE-NAND GATE
SCES106D – JULY 1997 – REVISED OCTOBER 1998
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
logic diagram, each gate (positive logic)
Y
A
B
C
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Output voltage range, V
O
(see Notes 1 and 2)
Input clamp current, I
IK
(V
I
< 0)
Output clamp current, I
OK
(V
O
< 0)
Continuous output current, I
O
Continuous current through V
CC
or GND
Package thermal impedance,
θ
JA
(see Note 3): D package
–0.5 V to 4.6 V
–0.5 V to 4.6 V
–0.5 V to V
CC
+ 0.5 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51.
–50 mA
–50 mA
±
50 mA
±
100 mA
127
°
C/W
182
°
C/W
170
°
C/W
–65
°
C to 150
°
C
recommended operating conditions (see Note 4)
MIN
MAX
UNIT
VCC
Supply voltage
1.65
3.6
V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65
×
VCC
1.7
VIH
High-level input voltage
V
2
0.35
×
VCC
0.7
VIL
Low-level input voltage
V
0.8
VI
VO
Input voltage
0
VCC
VCC
–4
V
Output voltage
0
V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
IOH
High level output current
High-level output current
–12
mA
–12
–24
4
IOL
Low level output current
Low-level output current
12
mA
12
24
t/
v
TA
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs literature number SCBA004.
Input transition rise or fall rate
0
5
ns/V
°
C
Operating free-air temperature
–40
85
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