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參數資料
| 型號： | SN74ACT7882PN |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Low-Voltage CMOS Quad 2-Input XOR Gate; Package: SOEIAJ-14; No of Pins: 14; Container: Rail |
| 中文描述： | 2048】18時鐘先入先出存儲器 |
| 文件頁數： | 1/15頁 |
| 文件大?。?/td> | 196K |
| 代理商： | SN74ACT7882PN |
SN74ACT7882
2048
×
18
CLOCKED FIRST-IN, FIRST-OUT MEMORY
SCAS445C – JUNE 1994 – REVISED APRIL 1998
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Member of the Texas Instruments
Widebus
Family
Independent Asynchronous Inputs and
Outputs
Read and Write Operations Can Be
Synchronized to Independent System
Clocks
Programmable Almost-Full/Almost-Empty
Flag
Pin-to-Pin Compatible With SN74ACT7881
and SN74ACT7811
Input-Ready, Output-Ready, and Half-Full
Flags
Cascadable in Word Width and/or Word
Depth (See Application Information)
Fast Access Times of 11 ns With a 50-pF
Load
High Output Drive for Direct Bus Interface
Package Options Include 68-Pin Plastic
Leaded Chip Carriers (FN) or 80-Pin Shrink
Quad Flat (PN) Package
28 29
V
CC
Q14
Q13
GND
Q12
Q11
V
CC
Q10
Q9
GND
Q8
Q7
V
CC
Q6
Q5
GND
Q4
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
30
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
D14
D13
D12
D11
D10
D9
V
CC
D8
GND
D7
D6
D5
D4
D3
D2
D1
D0
31 32 33 34
V
G
8 7
6
5
4
9
3
D
G
R
R
R
O
R
H
Q
Q
W
W
W
A
G
I
1 68 67
2
35 36 37 38 39
66 65
27
D
G
O
V
64 63 62 61
40 41 42 43
G
Q
Q
Q
Q
G
Q
D
D
C
FN PACKAGE
(TOP VIEW)
V
C
V
C
V
C
Copyright
1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus is a trademark of Texas Instruments Incorporated.
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