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參數(shù)資料
| 型號： | SN74ACT7806DL |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 256 】 18 STROBED FIRST-IN, FIRST-OUT MEMORY |
| 中文描述： | 256】18選通先入先出存儲器 |
| 文件頁數(shù)： | 3/10頁 |
| 文件大?。?/td> | 137K |
| 代理商： | SN74ACT7806DL |
256
×
18
STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS438C – APRIL 1992 – REVISED APRIL 1998
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Q0 – Q17
AF/AE
HF
OE
D0–D17
UNCK
LDCK
RESET
PEN
EMPTY
FULL
Status-
Flag
Logic
Read
Pointer
Reset
Logic
Location 1
Location 2
Location 255
Location 256
256
×
18 SRAM
Write
Pointer
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
AF/AE
24
O
Almost-full/almost-empty flag. Depth-offset values can be programmed for AF/AE, or the default value
of 32 can be used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AE is high when
memory contains X or fewer words or (256 – Y) or more words. AF/AE is high after reset.
D0–D17
2–9, 11–12,
12–14
I
18-bit data input port
EMPTY
29
O
Empty flag. EMPTY is high when the FIFO memory is not empty; EMPTY is low when the FIFO memory
is empty or upon assertion of RESET.
FULL
28
O
Full flag. FULL is high when the FIFO memory is not full or upon assertion of RESET; FULL is low when
the FIFO memory is full.
HF
22
O
Half-full flag. HF is high when the FIFO memory contains 128 or more words. HF is low after reset.
LDCK
25
I
Load clock. Data is written to the FIFO on the rising edge of LDCK when FULL is high.
OE
56
I
Output enable. When OE is high, the data outputs are in the high-impedance state.
PEN
23
I
Program enable. After reset and before the first word is written to the FIFO, the binary value on D0–D6
is latched as an AF/AE offset value when PEN is low and WRTCLK is high.
Q0–Q17
33–34, 36–38,
40–43, 45–49,
51, 53–55
O
18-bit data output port
RESET
1
I
Reset. A low level on this input resets the FIFO and drives FULL high and HF and EMPTY low.
UNCK
32
I
Unload clock. Data is read from the FIFO on the rising edge of UNCK when EMPTY is high.
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| SN74AHC00DB | Circular Connector; No. of Contacts:79; Series:MS27468; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:21; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:21-35 RoHS Compliant: No |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| SN74ACT7807-15FN | 功能描述:先進先出 2048 x 9 synchronous 先進先出 memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT7807-15PAG | 功能描述:先進先出 2048 x 9 synchronous 先進先出 memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT7807-20FN | 功能描述:先進先出 2048 x 9 synchronous 先進先出 memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT7807-20PAG | 功能描述:先進先出 2048 x 9 synchronous 先進先出 memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
| SN74ACT7807-25FN | 功能描述:先進先出 2048 x 9 synchronous 先進先出 memory RoHS:否 制造商:IDT 電路數(shù)量: 數(shù)據(jù)總線寬度:18 bit 總線定向:Unidirectional 存儲容量:4 Mbit 定時類型:Synchronous 組織:256 K x 18 最大時鐘頻率:100 MHz 訪問時間:10 ns 電源電壓-最大:3.6 V 電源電壓-最小:6 V 最大工作電流:35 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-80 封裝: |
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