參數(shù)資料
型號(hào): SN74ACT7804DL
廠(chǎng)商: Texas Instruments, Inc.
英文描述: 512 】 18 STROBED FIRST-IN, FIRST-OUT MEMORY
中文描述: 512】18選通先入先出存儲(chǔ)器
文件頁(yè)數(shù): 3/11頁(yè)
文件大?。?/td> 146K
代理商: SN74ACT7804DL
SN74ACT7804
512
×
18 STROBED FIRST-IN, FIRST-OUT MEMORY
SCAS204C – APRIL 1992 – REVISED APRIL 1998
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
functional block diagram
Q0–Q17
AF/AE
HF
OE
D0–D17
UNCK
LDCK
RESET
PEN
EMPTY
FULL
Status-
Flag
Logic
Read
Pointer
Reset
Logic
Location 1
Location 2
Location 511
Location 512
512
×
18 SRAM
Write
Pointer
Terminal Functions
TERMINAL
I/O
DESCRIPTION
NAME
NO.
AF/AE
24
O
Almost-full/almost-empty flag. Depth-offset values can be programmed for AF/AE, or the default value
of 64 can be used for both the almost-empty offset (X) and the almost-full offset (Y). AF/AE is high when
memory contains X or fewer words or (512 – Y) or more words. AF/AE is high after reset.
D0–D17
2–9, 11–12,
14–21
I
18-bit data input port
EMPTY
29
O
Empty flag. EMPTY is low when the FIFO is empty. A FIFO reset also causes EMPTY to go low.
FULL
28
O
Full flag. FULL is low when the FIFO is full. A FIFO reset causes FULL to go high.
HF
22
O
Half-full flag. HF is high when the FIFO memory contains 256 or more words. HF is low after reset.
LDCK
25
I
Load clock. Data is written to the FIFO on the rising edge of LDCK when FULL is high.
OE
56
I
Output enable. When OE is high, the data outputs are in the high-impedance state.
PEN
23
I
Program enable. After reset and before the first word is written to the FIFO, the binary value on D0–D7
is latched as an AF/AE offset value when PEN is low and LDCK is high.
Q0–Q17
33–34, 36–38,
40–43, 45–49,
51, 53–55
O
18-bit data output port
RESET
UNCK
1
I
Reset. A low level on RESET resets the FIFO and drives AF/AE and FULL high and HF and EMPTY low.
32
I
Unload clock. Data is read from the FIFO on the rising edge of UNCK when EMPTY is high.
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