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    參數(shù)資料
    型號(hào): SN74ABT651DB
    廠商: Texas Instruments, Inc.
    元件分類(lèi): 通用總線功能
    英文描述: OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
    中文描述: 八路總線收發(fā)器和寄存器具有三態(tài)輸出
    文件頁(yè)數(shù): 1/11頁(yè)
    文件大?。?/td> 188K
    代理商: SN74ABT651DB
    SN54ABT651, SN74ABT651
    OCTAL BUS TRANSCEIVERS AND REGISTERS
    WITH 3-STATE OUTPUTS
    SCBS083E – JANUARY 1991 – REVISED APRIL 1998
    1
    POST OFFICE BOX 655303
    DALLAS, TEXAS 75265
    State-of-the-Art EPIC-
    ΙΙ
    B
    BiCMOS Design
    Significantly Reduces Power Dissipation
    ESD Protection Exceeds 2000 V Per
    MIL-STD-883, Method 3015; Exceeds 200 V
    Using Machine Model (C = 200 pF, R = 0)
    Latch-Up Performance Exceeds 500 mA Per
    JESD 17
    Typical V
    OLP
    (Output Ground Bounce) < 1 V
    at V
    CC
    = 5 V, T
    A
    = 25
    °
    C
    High-Drive Outputs (–32-mA I
    OH
    ,
    64-mA I
    OL
    )
    Multiplexed Real-Time and Stored Data
    Inverting Data Paths
    Package Options Include Plastic
    Small-Outline (DW), Shrink Small-Outline
    (DB), and Thin Shrink Small-Outline (PW)
    Packages, Ceramic Chip Carriers (FK), and
    Plastic (NT) and Ceramic (JT) DIPs
    description
    These devices consist of bus-transceiver circuits,
    D-type flip-flops, and control circuitry arranged for
    multiplexed transmission of data directly from the
    data bus or from the internal storage registers.
    Output-enable (OEAB and OEBA) inputs are
    provided to control the transceiver functions. The
    select-control (SAB and SBA) inputs are provided
    to select whether real-time or stored data is
    transferred. A low input level selects real-time
    data, and a high input level selects stored data.
    Figure 1 illustrates the four fundamental
    bus-management
    functions
    performed with the ’ABT651 devices.
    that
    can
    be
    Data on the A or B bus, or both, can be stored in the internal D flip-flops by low-to-high transitions at the
    appropriate clock (CLKAB or CLKBA) inputs, regardless of the select- or enable-control pins. When SAB and
    SBA are in the real-time transfer mode, it also is possible to store data without using the internal D-type flip-flops
    by simultaneously enabling OEAB and OEBA. In this configuration, each output reinforces its input. When all
    the other data sources to the two sets of bus lines are at high impedance, each set remains at its last state.
    To ensure the high-impedance state during power up or power down, OEBA should be tied to V
    CC
    through a
    pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver
    (B to A). OEAB should be tied to GND through a pulldown resistor; the minimum value of the resistor is
    determined by the current-sourcing capability of the driver (A to B).
    Copyright
    1998, Texas Instruments Incorporated
    UNLESS OTHERWISE NOTED this document contains PRODUCTION
    DATA information current as of publication date. Products conform to
    specifications per the terms of Texas Instruments standard warranty.
    parameters.
    Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
    Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
    EPIC-
    ΙΙ
    B is a trademark of Texas Instruments Incorporated.
    SN54ABT651 . . . FK PACKAGE
    (TOP VIEW)
    SN54ABT651 . . . JT PACKAGE
    SN74ABT651 . . . DB, DW, NT, OR PW PACKAGE
    (TOP VIEW)
    1
    2
    3
    4
    5
    6
    7
    8
    9
    10
    11
    12
    24
    23
    22
    21
    20
    19
    18
    17
    16
    15
    14
    13
    CLKAB
    SAB
    OEAB
    A1
    A2
    A3
    A4
    A5
    A6
    A7
    A8
    GND
    V
    CC
    CLKBA
    SBA
    OEBA
    B1
    B2
    B3
    B4
    B5
    B6
    B7
    B8
    3 2 1
    13 14
    5
    6
    7
    8
    9
    10
    11
    OEBA
    B1
    B2
    NC
    B3
    B4
    B5
    A1
    A2
    A3
    NC
    A4
    A5
    A6
    4
    15 16 17 18
    A
    G
    N
    B
    B
    B
    O
    S
    C
    N
    28 27 26
    12
    A
    C
    S
    C
    V
    NC – No internal connection
    25
    24
    23
    22
    21
    20
    19
    相關(guān)PDF資料
    PDF描述
    SN74ABT651PW OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS
    SN54ABT651 Octal Bus Transceivers and Registers With 3-State Outputs(八總線收發(fā)器/寄存器(三態(tài)輸出))
    SN54ABT652AFK OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
    SN54ABT652AJT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
    SN54ABT652AW OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
    相關(guān)代理商/技術(shù)參數(shù)
    參數(shù)描述
    SN74ABT651DBLE 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:
    SN74ABT651DBR 功能描述:總線收發(fā)器 Octal Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
    SN74ABT651DBRE4 功能描述:總線收發(fā)器 Octal Bus Trncvr/Reg W/3-State Otpt RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
    SN74ABT651DBRG4 功能描述:總線收發(fā)器 Octal Bus Transc And Reg RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel
    SN74ABT651DW 功能描述:總線收發(fā)器 Octal Bus RoHS:否 制造商:Fairchild Semiconductor 邏輯類(lèi)型:CMOS 邏輯系列:74VCX 每芯片的通道數(shù)量:16 輸入電平:CMOS 輸出電平:CMOS 輸出類(lèi)型:3-State 高電平輸出電流:- 24 mA 低電平輸出電流:24 mA 傳播延遲時(shí)間:6.2 ns 電源電壓-最大:2.7 V, 3.6 V 電源電壓-最小:1.65 V, 2.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-48 封裝:Reel