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參數(shù)資料
| 型號： | SN74ABT25241 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 20Ω Octal Buffers/Drivers With 3-State Outputs(20Ω八緩沖器/驅(qū)動器(三態(tài)輸出)) |
| 中文描述： | 20Ω八路緩沖器/驅(qū)動器與3態(tài)輸出（20Ω八緩沖器/驅(qū)動器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/5頁 |
| 文件大?。?/td> | 90K |
| 代理商： | SN74ABT25241 |
SN74ABT25241
25-
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCBS249 – JUNE 1992 – REVISED JULY 1993
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Copyright
1993, Texas Instruments Incorporated
7–3
State-of-the-Art EPIC-
ΙΙ
B
BiCMOS Design
Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model (C = 200 pF,
R = 0)
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Typical V
OLP
(Output Ground Bounce)
< 1 V at V
CC
= 5 V, T
A
= 25
°
C
Designed to Facilitate Incident-Wave
Switching for Line Impedances of 25
or Greater
Distributed V
CC
and GND Pins Minimize
Noise Generated by the Simultaneous
Switching of Outputs
Bus-Hold Inputs Eliminate the Need for
External Pullup Resistors
Package Options Include Plastic
Small-Outline Packages and Standard
Plastic 300-mil DIPs
description
The SN74ABT25241 is a 25-
octal buffer and line driver designed specifically to improve both the performance
and density of 3-state memory address drivers, clock drivers, and bus-oriented transceivers.
The SN74ABT25241 contains complementary output-enable (1OE and 2OE) inputs. When 1OE is low and 2OE
is high, the device transmits data from the A inputs to the Y outputs. When 1OE and 2OE are high, the outputs
are in the high-impedance state. Output-enable 1OE affects only the 1Y outputs; output-enable 2OE affects only
the 2Y outputs.
This buffer/driver is capable of sinking 188 mA of I
OL
current, which facilitates switching 25-
transmission lines
on the incident wave. The distributed V
CC
and GND pins minimize switching noise for more reliable system
operation.
Active bus-hold circuitry is provided to hold unused or floating inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. OE should
be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the
current-sourcing capability of the driver.
The SN74ABT25241 is characterized for operation from –40
°
C to 85
°
C.
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
1Y1
GND
1Y2
1Y3
GND
1Y4
2Y1
GND
2Y2
2Y3
GND
2Y4
1OE
1A1
1A2
V
CC
1A3
1A4
2A1
2A2
V
CC
2A3
2A4
2OE
DW OR NT PACKAGE
(TOP VIEW)
EPIC-
ΙΙ
B is a trademark of Texas Instruments Incorporated.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
P
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