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參數(shù)資料
| 型號(hào)： | SN65LVDS86AQ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | FLATLINK RECEIVER |
| 中文描述： | FLATLINK接收機(jī) |
| 文件頁(yè)數(shù)： | 1/14頁(yè) |
| 文件大?。?/td> | 204K |
| 代理商： | SN65LVDS86AQ |
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SN65LVDS86AQ, SN75LVDS86A
FLATLINK
RECEIVER
SLLS318B – NOVEMBER 1998 – REVISED JANUARY 2001
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
3:21 Data Channel Expansion at up to
163 Million Bytes per Second Throughput
Suited for SVGA, XGA, or SXGA Display
Data Transmission From Controller to
Display With Very Low EMI
3 Data Channels and Clock Low-Voltage
Differential Channels In and 21 Data and
Clock Low-Voltage TTL Channels Out
Operates From a Single 3.3-V Supply
Tolerates 4-kV HBM ESD
Packaged in Thin Shrink Small-Outline
Package (TSSOP) With 20-Mil Terminal
Pitch
Consumes Less Than 1 mW When Disabled
Wide Phase-Lock Input Frequency Range
31 MHz to 68 MHz
No External Components Required for PLL
Inputs Meet or Exceed the Standard
Requirements of ANSI EIA/TIA-644
Standard
Improved Replacement for the DS90C364
and SN75LVDS86
Improved Jitter Tolerance
Available in Q-Temp Automotive
High Reliability Automotive Applications
Configuration Control / Print Support
Qualification to Automotive Standards
description
The SN65LVDS86AQ/SN75LVDS86A FlatLink receiver contains three serial-in 7-bit parallel-out shift registers
and four low-voltage differential signaling (LVDS) line receivers in a single integrated circuit. These functions
allow receipt of synchronous data from a compatible transmitter, such as the SN75LVDS81, ’83, ’84, or ’85, over
four balanced-pair conductors and expansion to 21 bits of single-ended low-voltage LVTTL synchronous data
at a lower transfer rate.
When receiving, the high-speed LVDS data is received and loaded into registers at seven times the LVDS input
clock (CLKIN) rate. The data is then unloaded to a 21-bit wide LVTTL parallel bus at the CLKIN rate. The
’LVDS86A presents valid data on the falling edge of the output clock (CLKOUT).
The ’LVDS86A requires only four line-termination resistors for the differential inputs and little or no control. The
data bus appears the same at the input to the transmitter and output of the receiver with the data transmission
transparent to the user(s). The only user intervention is the possible use of the shutdown/clear (SHTDN)
active-low input to inhibit the clock and shut off the LVDS receivers for lower power consumption. A low level
on this signal clears all internal registers to a low level.
The SN75LVDS86A is characterized for operation over ambient free-air temperatures of 0 C to 70 C. The
SN65LVDS86AQ is characterized for operation over the full Automotive temperature range of –40
°
C to 125
°
C.
Copyright
2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FlatLink is a trademark of Texas Instruments Incorporated.
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D17
D18
GND
D19
D20
NC
LVDSGND
A0M
A0P
A1M
A1P
LVDSV
CC
LVDSGND
A2M
A2P
CLKINM
CLKINP
LVDSGND
PLLGND
PLLV
CC
PLLGND
SHTDN
CLKOUT
D0
V
CC
D16
D15
D14
GND
D13
V
CC
D12
D11
D10
GND
D9
V
CC
D8
D7
D6
GND
D5
D4
D3
V
CC
D2
D1
GND
DGG PACKAGE
(TOP VIEW)
NC – Not connected
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN65LVDS86AQDGG | 功能描述:總線接收器 Flatlink RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| SN65LVDS86AQDGGR | 功能描述:總線接收器 Flatlink RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| SN65LVDS86AQDGGRQ1 | 功能描述:總線接收器 Auto Cat FlatLink Rec RoHS:否 制造商:Texas Instruments 接收機(jī)數(shù)量:4 接收機(jī)信號(hào)類型:Differential 接口類型:EIA/TIA-422-B, V.11 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:TSSOP-16 封裝:Reel |
| SN65LVDS93ADGG | 功能描述:LVDS 接口集成電路 10MHz-135MHz LVDS Serdes Transmitter RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
| SN65LVDS93ADGGR | 功能描述:LVDS 接口集成電路 10MHz-135MHz LVDS Serdes Transmitter RoHS:否 制造商:Texas Instruments 激勵(lì)器數(shù)量:4 接收機(jī)數(shù)量:4 數(shù)據(jù)速率:155.5 Mbps 工作電源電壓:5 V 最大功率耗散:1025 mW 最大工作溫度:+ 85 C 封裝 / 箱體:SOIC-16 Narrow 封裝:Reel |
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