參數(shù)資料
型號： SN65LVDS305ZQE
廠商： Texas Instruments, Inc.
英文描述： PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
中文描述： 可編程27位顯示器串行接口變送器
文件頁數(shù)： 1/25頁
文件大?。?/td> 586K
代理商： SN65LVDS305ZQE
www.ti.com
FEATURES
FlatLink3G Serial-Interface Technology
Compatible With FlatLink3G Receivers Such
as SN65LVDS306
Input Supports 24-bit RGB Video Mode
Interface
24-Bit RGB Data, 3 Control Bits, 1 Parity Bit,
and 2 Reserved Bits Transmitted Over One
Differential Line
SubLVDS Differential Voltage Levels
Effective Data Throughput up to 405 Mbps
Three Operating Modes to Conserve Power
–
Active-Mode QVGA 17.4 mW (Typical)
–
Shutdown Mode
≈
0.5
μ
A (Typical)
–
Standby Mode
≈
0.5
μ
A (Typical)
Bus Swap for Increased PCB Layout
Flexibility
1.8-V Supply Voltage
ESD Rating > 2 kV (HBM)
Typical Application: Host-Controller to
Display-Module Interface
Pixel Clock Range of 4 MHz–15 MHz
Failsafe on all CMOS Inputs
Packaging: 80-Terminal 5-mm
×
5-mm
μ
BGA
DESCRIPTION
The SN65LVDS305 serializer device converts 27
parallel
data
inputs
to
differential signaling (SubLVDS) serial output. It
loads a shift register with 24 pixel bits and 3 control
bits from the parallel CMOS input interface. In
addition to the 27 data bits, the device adds a parity
bit and two reserved bits into a 30-bit data word.
Each word is latched into the device by the pixel
clock (PCLK). The parity bit (odd parity) allows a
receiver to detect single bit errors. The serial shift
register is uploaded at 30 times the pixel-clock data
rate. A copy of the pixel clock is output on a separate
differential output.
Flatlink 3G
1
4
7
*
3
6
9
#
2
5
8
0
Application
Processor
with
RGB
Video
Interface
LVDS306
LVDS305
LCD
Driver
DATA
CLK
SN65LVDS305
SLLS744–AUGUST 2006
PROGRAMMABLE 27-BIT DISPLAY SERIAL INTERFACE TRANSMITTER
FPC
SN65LVDS305
parallel signaling, the SN65LVDS305 outputs reduce
the EMI of the interconnect by over 20 dB.
cabling
typically
with
interconnects
display.
the
to
the
Compared
The SN65LVDS305 supports three power modes
(shutdown, standby and active) to conserve power.
When transmitting, the PLL locks to the incoming
pixel
clock,
PCLK,
and
high-speed clock at the line rate of the data lines.
The parallel data are latched on the rising or falling
edge of PCLK, as selected by the external control
signal CPOL. The serialized data is presented on the
serial output, D, together with a recreated PCLK
generated from the internal high-speed clock that is
output on CLK. If PCLK stops, the device enters a
standby mode to conserve power.
generates
an
internal
The parallel (CMOS) input bus offers a bus-swap
feature. The SWAP terminal configures the input
order of the pixel data to be either R[7:0]. G[7:0],
B[7:0], VS, HS, DE or B[0:7]. G[0:7], R[0:7], VS, HS,
DE. This gives a PCB designer the flexibility to better
match the bus to the host controller pinout or to put
the transmitter device on the top side or the bottom
side of the PCB.
one
sub-low-voltage
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
FlatLink is a trademark of Texas Instruments.
μ
BGA is a registered trademark of Tessera, Inc..
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 2006, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SN65LVDS305ZQER 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
SN65LVDS306ZQER 功能描述:串行器/解串器 - Serdes QVGAVGA 27B Display Ser Interface RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
SN65LVDS307ZQCR 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
SN65LVDS307ZQCT 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
SN65LVDS308ZQCR 功能描述:串行器/解串器 - Serdes 27B Display Ser Interface Trnsmitter RoHS:否 制造商:Texas Instruments 類型:Deserializer 數(shù)據(jù)速率:1.485 Gbit/s 輸入類型:ECL/LVDS 輸出類型:LVCMOS 輸入端數(shù)量:1 輸出端數(shù)量:20 工作電源電壓:2.375 V to 2.625 V 工作溫度范圍:0 C to + 70 C 封裝 / 箱體:TQFP-64
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