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參數(shù)資料
| 型號(hào)： | SN55173FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE DIFFERENTIAL LINE RECEIVERS |
| 中文描述： | 翻兩番差分線接收機(jī) |
| 文件頁(yè)數(shù)： | 5/11頁(yè) |
| 文件大小： | 155K |
| 代理商： | SN55173FK |
SN55173, SN65173, SN75173
QUADRUPLE DIFFERENTIAL LINE RECEIVERS
SLLS144E – OCTOBER 1980 – REVISED APRIL 2000
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended ranges of common-mode input voltage, supply
voltage, and operating free-air temperature
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VIT+
VIT–
Vhys
VIK
Positive-going input threshold voltage
VO = 2.7 V,
VO = 0.5 V,
See Figure 4
IO = –0.4 mA
IO = 16 mA
0.2
V
Negative-going input threshold voltage
–0.2
V
Hysteresis (VIT+ – VIT–)
Enable-input clamp voltage
50
mV
II = –18 mA
–1.5
V
SN55173
2.5
V
VOH
High-level output voltage
VID = 200 mV,
IOH = –400
μ
A
SN65173,
SN75173
2.7
V
VOL
Low level output voltage
Low-level output voltage
VID=
VID = –200 mV,
See Figure 1
IOL = 8 mA
IOL = 16 mA
0.45
V
0.5
±
20
IOZ
High-impedance-state output current
VO = 0.4 V to 2.4 V
μ
A
II
Line input current
Other input at 0 V,
See Note 3
VI = 12 V
VI = –7 V
1
mA
–0.8
IIH
IIL
ri
IOS
ICC
All typical values are at VCC = 5 V, TA = 25
°
C.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold voltage
levels only.
NOTE 3: Refer to TIA/EIA-422-B and TIA/EIA-423-B for exact conditions.
High-level enable-input current
VIH = 2.7 V
VIL = 0.4 V
20
μ
A
μ
A
k
mA
Low-level enable-input current
–100
Input resistance
12
Short-circuit output current
–15
–85
Supply current
Outputs disabled
70
mA
switching characteristics, V
CC
= 5 V, T
A
= 25
°
C
PARAMETER
TEST CONDITIONS
MIN
TYP
20
MAX
UNIT
ns
tPLH
tPHL
tPZH
tPZL
tPHZ
tPLZ
Propagation delay time, low-to-high-level output
VID = –1.5 V to 1.5 V,
CL = 15 pF,
CL = 15 pF,
CL = 15 pF,
CL = 5 pF,
CL = 5 pF,
35
Propagation delay time, high-to-low-level output
See Figure 1
22
35
ns
Output enable time to high level
See Figure 2
17
22
ns
Output enable time to low level
See Figure 3
20
25
ns
Output disable time from high level
See Figure 2
21
30
ns
Output disable time from low level
See Figure 3
30
40
ns
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| SN55182FK | DUAL DIFFERENTIAL LINE RECEIVERS |
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| SN55182W | DUAL DIFFERENTIAL LINE RECEIVERS |
| SN55183FK | DUAL DIFFERENTIAL LINE DRIVERS |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SN55173J | 制造商:Texas Instruments 功能描述:Quad Receiver RS-422/RS-423/RS-485 16-Pin CDIP |
| SN55182 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL DIFFERENTIAL LINE RECEIVERS |
| SN55182FK | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL DIFFERENTIAL LINE RECEIVERS |
| SN55182J | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL DIFFERENTIAL LINE RECEIVERS |
| SN55182-SP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:RAD-TOLERANT CLASS V, DUAL DIFFERENTIAL LINE RECEIVER |
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