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參數(shù)資料
| 型號： | SN54LVTR245FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Dual D-Type Flip-Flop with Set and Reset; Package: PDIP-14; No of Pins: 14; Container: Rail; Qty per Container: 500 |
| 中文描述： | 的3.3V ABT生根粉3八路總線收發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 1/7頁 |
| 文件大小： | 117K |
| 代理商： | SN54LVTR245FK |
SN54LVTR245, SN74LVTR245
3.3-V ABT OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCAS428 – OCTOBER 1993
Copyright
1993, Texas Instruments Incorporated
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
CC
)
Supports Unregulated Battery Operation
Down to 2.7 V
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
Reduced Output Structure on A Port
Minimizes V
OHV
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), and Thin Shrink Small-Outline (PW)
Packages, Ceramic Chip Carriers (FK), and
Ceramic DIPs (J)
description
These octal bus transceivers are designed
specifically for low-voltage (3.3-V) V
CC
operation,
but with the capability to provide a TTL interface to
a 5-V system environment.
The
′
LVTR245 is designed for asynchronous communication between data buses. The device transmits data
from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction-control
(DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The A port is designed to minimize the undershoot exhibited on high to low transition during simultaneous
switching conditions.
The SN74LVTR245 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVTR245 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C.
The SN74LVTR245 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54LVTR245 . . . J PACKAGE
SN74LVTR245 . . . DB, DW, OR PW PACKAGE
(TOP VIEW)
3
2
1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
B1
B2
B3
B4
B5
A3
A4
A5
A6
A7
A
A
D
B
B
O
A
G
B
V
C
SN54LVTR245 . . . FK PACKAGE
(TOP VIEW)
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
parameters.
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PDF描述 |
|---|---|
| SN54LVTR245J | Dual D-Type Flip-Flop with Set and Reset; Package: PDIP-14; No of Pins: 14; Container: Rail; Qty per Container: 500 |
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