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參數(shù)資料
| 型號： | SN54LVTH16245AWD |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉16位總線收發(fā)3態(tài)輸出 |
| 文件頁數(shù)： | 2/18頁 |
| 文件大?。?/td> | 496K |
| 代理商： | SN54LVTH16245AWD |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The 'LVTH16245A devices are 16-bit (dual-octal) noninverting 3-state transceivers designed for low-voltage
(3.3-V) V
CC
operation, but with the capability to provide a TTL interface to a 5-V system environment.
The devices are designed for asynchronous communication between two data buses. The logic levels of the
direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess I
CC
and I
CCZ
.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
GQL OR ZQL PACKAGE
(TOP VIEW)
J
K
H
G
F
E
D
C
B
A
2
1
3 4
6
5
abc
SN54LVTH16245A, SN74LVTH16245A
3.3-V ABT 16-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS143Q–MAY 1992–REVISED OCTOBER 2005
When V
CC
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using I
off
and power-up 3-state. The I
off
circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
TERMINAL ASSIGNMENTS
(1)
(56-Ball GQL/ZQL Package)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
1DIR
1B2
1B4
1B6
1B8
2B1
2B3
2B5
2B7
2DIR
NC
1B1
1B3
1B5
1B7
2B2
2B4
2B6
2B8
NC
NC
GND
V
CC
GND
NC
GND
V
CC
GND
NC
1A1
1A3
1A5
1A7
2A2
2A4
2A6
2A8
NC
1OE
1A2
1A4
1A6
1A8
2A1
2A3
2A5
2A7
2OE
GND
V
CC
GND
NC
GND
V
CC
GND
NC
abc
abc
(1)
NC – No internal connection
2
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