參數(shù)資料
型號(hào): SN54LVT543
廠商: Texas Instruments, Inc.
英文描述: 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
中文描述: 的3.3V ABT生根粉八路收發(fā)登記,3態(tài)輸出
文件頁數(shù): 2/13頁
文件大?。?/td> 335K
代理商: SN54LVT543
SN54LVT543, SN74LVT543
3.3-V ABT OCTAL REGISTERED TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS137D – MAY 1992 – REVISED JULY 1995
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description (continued)
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVT543 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LVT543 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74LVT543 is characterized for operation from –40
°
C to 85
°
C.
FUNCTION TABLE
INPUTS
OUTPUT
B
CEAB
H
LEAB
X
OEAB
X
A
X
Z
X
X
H
X
Z
L
H
L
X
B0
L
L
L
L
L
L
L
L
H
H
A-to-B data flow is shown; B-to-A flow control is the
same except that it uses CEBA, LEBA, and OEBA.
Output level before the indicated steady-state input
conditions were established
logic symbol
§
1
1
4
2C6
14
3
A1
4
A2
B1
22
5D
5
A3
6
7
A4
A5
8
A6
9
10
A7
A8
B2
21
B3
20
B5
B6
18
17
B4
19
B8
15
B7
16
LEAB
3
G2
11
CEAB
2EN4
13
OEAB
1C5
1
LEBA
G1
23
CEBA
1EN3
2
OEBA
6D
§This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DB, DW, JT, and PW packages.
相關(guān)PDF資料
PDF描述
SN74LVT543DWE4 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT543DWR 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT543DWRE4 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT543PW 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
SN74LVT543PWRE4 3.3-V ABT OCTAL REGISTERED TRANSCEIVERS WITH 3-STATE OUTPUTS
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