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參數(shù)資料
| 型號(hào)： | SN54LVT16601 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3V ABT 18-Bit Universal Bus Transceivers With 3-State Outputs(3.3VABT18位通用總線收發(fā)器(三態(tài)輸出)) |
| 中文描述： | 3.3生根粉18位通用總線收發(fā)器與三態(tài)輸出（3.3VABT18位通用總線收發(fā)器（三態(tài)輸出）） |
| 文件頁數(shù)： | 1/6頁 |
| 文件大小： | 131K |
| 代理商： | SN54LVT16601 |
SN54LVT16601, SN74LVT16601
3.3-V ABT 18-BIT UNIVERSAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCES002A – JULY 1994 – REVISED JULY 1995
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
State-of-the-Art Advanced BiCMOS
Technology (ABT) Design for 3.3-V
Operation and Low-Static Power
Dissipation
Members of the Texas Instruments
Widebus
Family
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
CC
)
Support Unregulated Battery Operation
Down to 2.7 V
UBT
(Universal Bus Transceiver)
Combines D-Type Latches and D-Type
Flip-Flops for Operation in Transparent,
Latched, or Clocked Mode
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
= 3.3 V, T
A
= 25
°
C
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
Support Live Insertion
Distributed V
CC
and GND Pin Configuration
Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes
PCB Layout
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages and 380-mil
Fine-Pitch Ceramic Flat (WD) Package
Using 25-mil Center-to-Center Spacings
description
The ’LVT16601 are 18-bit universal bus transceivers designed for low-voltage (3.3-V) V
CC
operation, but with
the capability to provide a TTL interface to a 5-V system environment. These 18-bit universal bus transceivers
combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.
Copyright
1995, Texas Instruments Incorporated
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
Widebus and UBT are trademarks of Texas Instruments Incorporated.
SN54LVT16601 . . . WD PACKAGE
SN74LVT16601 . . . DGG OR DL PACKAGE
(TOP VIEW)
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OEAB
LEAB
A1
GND
A2
A3
V
CC
A4
A5
A6
GND
A7
A8
A9
A10
A11
A12
GND
A13
A14
A15
V
CC
A16
A17
GND
A18
OEBA
LEBA
CLKENAB
CLKAB
B1
GND
B2
B3
V
CC
B4
B5
B6
GND
B7
B8
B9
B10
B11
B12
GND
B13
B14
B15
V
CC
B16
B17
GND
B18
CLKBA
CLKENBA
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
P
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PDF描述 |
|---|---|
| SN74LVT16601 | 3.3V ABT 18-Bit Universal Bus Transceivers With 3-State Outputs(3.3VABT18位通用總線收發(fā)器(三態(tài)輸出)) |
| SN54LVT16646WD | DC-DC Converter; Supply Voltage:75V; Output Voltage:2.5V; Number of Outputs:1; Power Rating:100W; Mounting Type:PC Board; Series:Eighth-Brick; Efficiency:91%; Leaded Process Compatible:Yes; Output Current:40A RoHS Compliant: Yes |
| SN54LVT16646 | Analog Multiplexers/Demultiplexers; Package: SO-16 WB; No of Pins: 16; Container: Rail; Qty per Container: 47 |
| SN74LVT16646DLR | 3.3V ABT 16 BIT BUS TRANSCEIVERS AND REGISTERS WITH 3 STATE OUTPUTS |
| SN74LVT16646DGG | 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS |
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