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參數(shù)資料
| 型號(hào)： | SN54LVT125FK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS |
| 中文描述： | 的3.3V ABT生根粉翻兩番總線緩沖器，具有三態(tài)輸出 |
| 文件頁(yè)數(shù)： | 2/7頁(yè) |
| 文件大?。?/td> | 117K |
| 代理商： | SN54LVT125FK |
SN54LVT125, SN74LVT125
3.3-V ABT QUADRUPLE BUS BUFFERS
WITH 3-STATE OUTPUTS
SCBS133D – MAY 1992 – REVISED JULY 1995
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
L
A
H
H
L
L
L
H
X
Z
logic symbol
logic diagram (positive logic)
EN
1
2
1OE
1A
1Y
3
4
5
2A
10
9
3A
13
12
4A
2Y
6
3Y
8
4Y
11
2OE
3OE
4OE
1
4
5
6
2A
2Y
2OE
1
2
3
1A
1Y
1OE
10
9
8
3A
3Y
3OE
13
12
11
4A
4Y
4OE
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
Pin numbers shown are for the D, DB, J, and PW packages.
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, V
I
(see Note 1)
Voltage range applied to any output in the high state or power-off state, V
O
(see Note 1)
Current into any output in the low state, I
O
: SN54LVT125
SN74LVT125
Current into any output in the high state, I
O
(see Note 2): SN54LVT125
–0.5 V to 4.6 V
–0.5 V to 7 V
–0.5 V to 7 V
. . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
96 mA
128 mA
48 mA
64 mA
–50 mA
–50 mA
1.25 W
0.5 W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVT125
. . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(V
I
< 0)
Output clamp current, I
OK
(V
O
< 0)
Maximum power dissipation at T
A
= 55
°
C (in still air) (see Note 3):D package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . .
DB or PW package
Storage temperature range, T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The maximum package power dissipation is calculated using a junction temperature of 150
°
C and a board trace length of 750 mils.
For more information, refer to the Package Thermal Considerationsapplication note in the 1994 ABT Advanced BiCMOS Technology
Data Book literature number SCBD002B.
–65
°
C to 150
°
C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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