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參數(shù)資料
| 型號： | SN54LVC06AJ |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 通用總線功能 |
| 英文描述： | Monolithic WFR, Binary Counter; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | 十六進(jìn)制逆變器緩沖器/驅(qū)動開漏輸出 |
| 文件頁數(shù)： | 2/15頁 |
| 文件大?。?/td> | 376K |
| 代理商： | SN54LVC06AJ |
www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the device when it is powered down.
A
Y
Absolute Maximum Ratings
(1)
over operating free-air temperature range (unless otherwise noted)
SN54LVC06A, SN74LVC06A
HEX INVERTER BUFFERS/DRIVERS
WITH OPEN-DRAIN OUTPUTS
SCAS596N–OCTOBER 1997–REVISED JULY 2005
FUNCTION TABLE
(EACH INVERTER)
INPUT
A
H
L
OUTPUT
Y
L
H
LOGIC DIAGRAM, EACH INVERTER (POSITIVE LOGIC)
MIN
–0.5
–0.5
–0.5
MAX
6.5
6.5
6.5
–50
–50
±
50
±
100
UNIT
V
V
V
mA
mA
mA
mA
V
CC
V
I
V
O
I
IK
I
OK
I
O
Supply voltage range
Input voltage range
(2)
Output voltage range
Input clamp current
Output clamp current
Continuous output current
Continuous current through V
CC
or GND
V
I
< 0
V
O
< 0
D package
(3)
DB package
(3)
DGV package
(3)
NS package
(3)
PW package
(3)
RGY package
(4)
86
96
127
76
113
47
150
500
θ
JA
Package thermal impedance
°
C/W
T
stg
P
tot
Storage temperature range
Power dissipation
(5)(6)
–65
°
C
mW
T
A
= –40
°
C to 125
°
C
(1)
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
The package thermal impedance is calculated in accordance with JESD 51-7.
The package thermal impedance is calculated in accordance with JESD 51-5.
For the D package: above 70
°
C the value of P
derates linearly with 8 mW/K.
For the DB, DGV, NS, and PW packages: above 60
°
C the value of P
tot
derates linearly with 5.5 mW/K.
(2)
(3)
(4)
(5)
(6)
2
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| SN54LVC06AW | Monolithic WFR, Binary Counter; Package: TSSOP-16; No of Pins: 16; Container: Tape and Reel; Qty per Container: 2500 |
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