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參數(shù)資料
| 型號： | SN54LV74AFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS |
| 中文描述： | 雙上升沿觸發(fā)的D型觸發(fā)器 |
| 文件頁數(shù)： | 4/8頁 |
| 文件大?。?/td> | 157K |
| 代理商： | SN54LV74AFK |
SN54LV74A, SN74LV74A
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS
SCLS381D – AUGUST 1997 – REVISED JUNE 1998
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
SN54LV74A
MIN
VCC–0.1
2
SN74LV74A
MIN
VCC–0.1
2
UNIT
TYP
MAX
TYP
MAX
IOH = –50
μ
A
IOH = –2 mA
IOH = –6 mA
IOH = –12 mA
IOL = 50
μ
A
IOL = 2 mA
IOL = 6 mA
IOL = 12 mA
VI = VCC or GND
VI = VCC or GND,
VI or VO = 0 to 5.5 V
2 V to 5.5 V
VOH
2.3 V
V
3 V
2.48
2.48
4.5 V
3.8
3.8
2 V to 5.5 V
0.1
0.1
VOL
2.3 V
0.4
0.4
V
3 V
0.44
0.44
4.5 V
0.55
±
1
20
0.55
±
1
20
II
ICC
Ioff
5.5 V
μ
A
μ
A
μ
A
IO = 0
5.5 V
0 V
5
5
Ci
VI= VCCor GND
VI = VCC or GND
3.3 V
5 V
2.1
2.1
2.1
2.1
pF
timing requirements over recommended operating free-air temperature range, V
CC
= 2.5 V
±
0.2 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25
°
C
MIN
8
SN54LV74A
MIN
9
SN74LV74A
MIN
9
UNIT
MAX
MAX
MAX
tw
Pulse duration
PRE or CLR low
ns
CLK
8
9
9
tsu
Setup time before CLK
↑
Data
8
9
9
ns
PRE or CLR inactive
7
7
7
th
Hold time, data after CLK
↑
0.5
0.5
0.5
ns
timing requirements over recommended operating free-air temperature range, V
CC
= 3.3 V
±
0.3 V
(unless otherwise noted) (see Figure 1)
PARAMETER
TA = 25
°
C
MIN
6
SN54LV74A
MIN
7
SN74LV74A
MIN
7
UNIT
MAX
MAX
MAX
tw
Pulse duration
PRE or CLR low
ns
CLK
6
7
7
tsu
Setup time before CLK
↑
Data
6
7
7
ns
PRE or CLR inactive
5
5
5
th
Hold time, data after CLK
↑
0.5
0.5
0.5
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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