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參數(shù)資料
| 型號(hào)： | SN54LV574AFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| 中文描述： | 八路邊沿觸發(fā)的D型倒裝3觸發(fā)器態(tài)輸出 |
| 文件頁數(shù)： | 2/17頁 |
| 文件大小： | 519K |
| 代理商： | SN54LV574AFK |
SCLS412I APRIL 1998 REVISED APRIL 2005
2
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
description/ordering information (continued)
The ’LV574A devices are octal edge-triggered D-type flip-flops designed for 2-V to 5.5-V V
CC
operation.
These devices feature 3-state outputs designed specifically for driving highly capacitive or relatively
low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data
(D) inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high
or low logic levels) or high-impedance state. In the high-impedance state, the outputs neither load nor drive the
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines
without need for interface or pullup components.
OE does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered
while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to V
CC
through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for partial-power-down applications using I
off
. The I
off
circuitry disables the
outputs, preventing damaging current backflow through the devices when they are powered down.
terminal assignments
1
2
3
4
A
1D
OE
VCC
2D
1Q
B
3D
3Q
2Q
C
5D
4D
5Q
4Q
D
7D
7Q
6D
6Q
E
GND
8D
CLK
8Q
FUNCTION TABLE
(each flip-flop)
INPUTS
CLK
↑
↑
H or L
OUTPUT
Q
OE
D
L
H
H
L
L
L
L
X
Q0
Z
H
X
X
GQN PACKAGE
(TOP VIEW)
1
2
3
4
A
B
C
D
E
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| SNJ54LV574AFK | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
| SN54LV574A | Octal 3-State Non-Inverting Transparent Latch; Package: SOEIAJ-20; No of Pins: 20; Container: Rail; Qty per Container: 40 |
| SN54LV574AJ | Octal 3-State Non-Inverting Transparent Latch; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18 |
| SN54LV574AW | Octal 3-State Non-Inverting Transparent Latch; Package: 20 LEAD PDIP; No of Pins: 20; Container: Rail; Qty per Container: 18 |
| SN74LV574ADGV | OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS |
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