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| 型號(hào)： | SN54LV4066AJ |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE BILATERAL ANALOG SWITCHES |
| 中文描述： | 翻兩番雙邊模擬開關(guān) |
| 文件頁數(shù)： | 3/12頁 |
| 文件大?。?/td> | 178K |
| 代理商： | SN54LV4066AJ |
SN54LV4066A, SN74LV4066A
QUADRUPLE BILATERAL ANALOG SWITCHES
SCLS427A – APRIL 1999 – REVISED APRIL 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
(see Note 1)
Input voltage range, V
I
(see Note 1)
Switch I/O voltage range, V
IO
(see Note 1 and 2)
Control-input clamp current, I
IK
(V
I
< 0)
I/O diode current, I
IOK
(V
IO
< 0 or V
IO
> V
CC
)
On-state switch current, I
T
(V
IO
= 0 to V
CC
)
Continuous current through V
CC
or GND
Package thermal impedance,
θ
JA
(see Note 3): D package
–0.5 V to 7 V
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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DB package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NS package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.5 V to V
CC
+ 0.5 V
–20 mA
±
50 mA
±
25 mA
±
50 mA
127
°
C/W
158
°
C/W
182
°
C/W
78
°
C/W
127
°
C/W
170
°
C/W
Storage temperature range, T
stg
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 7 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
–65
°
C to 150
°
C
recommended operating conditions (see Note 4)
SN54LV4066A
MIN
2
SN74LV4066A
MIN
2
UNIT
MAX
MAX
VCC
Supply voltage
5.5
5.5
V
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.5
1.5
VIH
High level input voltage control inputs
High-level input voltage, control inputs
VCC
VCC
VCC
0.7
VCC
VCC
VCC
0.7
V
0.7
0.7
0.7
0.7
0.5
0.5
VIL
Low level input voltage control inputs
Low-level input voltage, control inputs
VCC
VCC
VCC
0.3
VCC
VCC
VCC
0.3
V
0.3
0.3
0.3
0.3
VI
VIO
Control input voltage
0
5.5
0
5.5
V
Input/output voltage
0
VCC
200
0
VCC
200
V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
0
0
t/
v
Input transition rise or fall rate
0
100
0
100
ns/V
0
20
0
20
TA
Operating free-air temperature
With supply voltages at or near 2 V, the analog switch on-state resistance becomes very nonlinear. Only digital signals should be transmitted
at these low supply voltages.
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs literature number SCBA004.
–55
125
–40
85
°
C
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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