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參數(shù)資料
| 型號(hào)： | SN54LV138 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 3-Line To 8-Line Decoders(3-8線譯碼器) |
| 中文描述： | 3線至8線解碼器（3-8線譯碼器） |
| 文件頁數(shù)： | 1/7頁 |
| 文件大?。?/td> | 174K |
| 代理商： | SN54LV138 |
SN54LV138, SN74LV138
3-LINE TO 8-LINE DECODERS/DEMULTIPLEXERS
SCLS190D – FEBRUARY 1993 – REVISED JULY 1996
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
EPIC
(Enhanced-Performance Implanted
CMOS) 2-
μ
Process
Typical V
OLP
(Output Ground Bounce)
< 0.8 V at V
CC
, T
A
= 25
°
C
Typical V
OHV
(Output V
OH
Undershoot)
> 2 V at V
CC
, T
A
= 25
°
C
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA
Per JEDEC Standard JESD-17
Package Options Include Plastic
Small-Outline (D), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW),
Ceramic Flat (W) Packages, Chip Carriers
(FK), and (J) 300-mil DIPs
description
These 3-line to 8-line decoders/demultiplexers
are designed for 2.7-V to 5.5-V V
CC
operation.
The ’LV138 are designed for high-performance
memory-decoding or data-routing applications
requiring very short propagation delay times. In
high-performance memory systems, this decoder
can be used to minimize the effects of system
decoding. When employed with high-speed
utilizing a fast enable circuit, the delay times of this
decoder and the enable time of the memory are
usually less than the typical access time of the
memory. This means that the effective system
delay introduced by the decoder is negligible.
The conditions at the binary-select inputs and the three enable inputs select one of eight output lines. Two
active-low and one active-high enable inputs reduce the need for external gates or inverters when expanding.
A 24-line decoder can be implemented without external inverters and a 32-line decoder requires only one
inverter. An enable input can be used as a data input for demultiplexing applications.
The SN74LV138 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count
and functionality of standard small-outline packages in less than half the printed-circuit-board area.
The SN54LV138 is characterized for operation over the full military temperature range of –55
°
C to 125
°
C. The
SN74LV138 is characterized for operation from –40
°
C to 85
°
C.
Copyright
1996, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
EPIC is a trademark of Texas Instruments Incorporated.
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
Y1
Y2
NC
Y3
Y4
C
G2A
NC
G2B
G1
B
A
N
Y
Y
V
Y
Y
G
N
SN54LV138 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
A
B
C
G2A
G2B
G1
Y7
GND
V
CC
Y0
Y1
Y2
Y3
Y4
Y5
Y6
SN54LV138 . . . J OR W PACKAGE
SN74LV138 . . . D, DB, OR PW PACKAGE
(TOP VIEW)
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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參數(shù)描述 |
|---|---|
| SN54S00J | 制造商:Texas Instruments 功能描述:NAND Gate 4-Element 2-IN Bipolar 14-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54S00W | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54S02J | 制造商:Texas Instruments 功能描述: |
| SN54S03J | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:2-INPUT NAND GATE (OC) - Rail/Tube |
| SN54S04J | 制造商:Texas Instruments 功能描述:Inverter 6-Element Bipolar 14-Pin CDIP Tube 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述:INVERTER 6-ELEM BIPOLAR 14CDIP - Rail/Tube 制造商:Texas Instruments 功能描述:HEX INVERTER *NIC* |
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