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參數(shù)資料
| 型號： | SN54LS669J |
| 廠商： | ON SEMICONDUCTOR |
| 元件分類： | 計數(shù)器 |
| 英文描述： | Quad 2-Input NAND Gate; Package: TSSOP-14; No of Pins: 14; Container: Tape and Reel; Qty per Container: 2500 |
| 中文描述： | LS SERIES, SYN POSITIVE EDGE TRIGGERED 4-BIT BIDIRECTIONAL BINARY COUNTER, CDIP16 |
| 封裝： | CERAMIC, DIP-16 |
| 文件頁數(shù)： | 1/4頁 |
| 文件大?。?/td> | 132K |
| 代理商： | SN54LS669J |
Semiconductor Components Industries, LLC, 2006
July, 2006
Rev. 6
1
Publication Order Number:
SN74LS669/D
SN74LS669
SYNCHRONOUS 4-BIT
UP/DOWN COUNTER
The SN54/74LS669 is a synchronous 4-bit up/down counter. The
LS669 is a 4-bit binary counter. For high speed counting applications,
this presettable counter features an internal carry lookahead for
cascading purposes. By clocking all flip-flops simultaneously so the
outputs change coincident with each other (when instructed to do so by
the count enable inputs and internal gating) synchronous operation is
provided. This helps to eliminate output counting spikes, normally
associated with asynchronous (ripple-clock) counters. The four
master-slave flip-flops are triggered on the rising (positive-going)
edge of the clock waveform by a buffered clock input.
Circuitry of the load inputs allows loading with the carry-enable
output of the cascaded counters. Because loading is synchronous,
disabling of the counter by setting up a low level on the load input will
cause the outputs to agree with the data inputs after the next clock
pulse.
Cascading counters for N-bit synchronous applications are provided
by the carry look-ahead circuitry, without additional gating. Two
count-enable inputs and a carry output help accomplish this function.
Count-enable inputs (P and T) must both be low to count. The level of
the up-down input determines the direction of the count. When the
input level is low, the counter counts down, and when the input is high,
the count is up. Input T is fed forward to enable the carry output. The
carry output will now produce a low level output pulse with a duration
9 equal to the high portion of the Q
A
output when counting up and
when counting down 9 equal to the low portion of the Q
A
output. This
low level carry pulse may be utilized to enable successive cascaded
stages. Regardless of the level of the clock input, transitions at the P or
T inputs are allowed. By diode-clamping all inputs, transmission line
effects are minimized which allows simplification of system design.
Any changes at control inputs (ENABLE P, ENABLE T, LOAD,
UP/DOWN) will have no effect on the operating mode until clocking
occurs because of the fully independant clock circuits. Whether
enabled, disabled, loading or counting, the function of the counter is
dictated entirely by the conditions meeting the stable setup and hold
times.
Programmable Look-Ahead Up/Down Binary/Decade Counters
Fully Synchronous Operation for Counting and Programming
Internal Look-Ahead for Fast Counting
Carry Output for n-Bit Cascading
Fully Independent Clock Circuit
Buffered Outputs
http://onsemi.com
SYNCHRONOUS 4-BIT
UP/DOWN COUNTER
LOW POWER SCHOTTKY
ORDERING INFORMATION
SN54LSXXXJ
SN74LSXXXN
SN74LSXXXD
Ceramic
Plastic
SOIC
J SUFFIX
CERAMIC
CASE 620-09
N SUFFIX
PLASTIC
CASE 648-08
16
1
16
1
16
1
D SUFFIX
SOIC
CASE 751B-03
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