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參數(shù)資料
| 型號(hào)： | SN54HCT646W |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Dual EIA-423/EIA-232D Line Driver; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Rail; Qty per Container: 98 |
| 中文描述： | 八路總線收發(fā)器和寄存器具有三態(tài)輸出 |
| 文件頁(yè)數(shù)： | 5/8頁(yè) |
| 文件大小： | 153K |
| 代理商： | SN54HCT646W |
SN54HCT646, SN74HCT646
OCTAL BUS TRANSCEIVERS AND REGISTERS
WITH 3-STATE OUTPUTS
SCLS178B – MARCH 1984 – REVISED MAY 1997
5
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
SN54HCT646
MIN
NOM
SN74HCT646
MIN
NOM
UNIT
MAX
MAX
VCC
VIH
VIL
VI
VO
tt
TA
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
High-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2
2
V
Low-level input voltage
0
0.8
0
0.8
V
Input voltage
0
VCC
VCC
500
0
VCC
VCC
500
V
Output voltage
0
0
V
Input transition (rise and fall) time
0
0
ns
°
C
Operating free-air temperature
–55
125
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
4.499
SN54HCT646
MIN
4.4
SN74HCT646
MIN
4.4
UNIT
MIN
4.4
MAX
MAX
MAX
VOH
VI= VIHor VIL
IOH = –20
μ
A
IOH = –6 mA
IOL = 20
μ
A
IOL = 6 mA
4 5 V
4.5 V
V
3.98
4.3
3.7
3.84
VOL
VI= VIHor VIL
VI = VIH or VIL
4 5 V
4.5 V
0.001
0.1
0.1
0.1
V
0.17
±
0.1
±
0.01
0.26
±
100
±
0.5
0.4
0.33
±
1000
II
IOZ
ICC
Control inputs
VI = VCC or 0
VO = VCC or 0
VI = VCC or 0,
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
5.5 V
±
1000
±
10
160
nA
μ
A
μ
A
A or B
5.5 V
±
5
80
IO = 0
5.5 V
8
ICC
5.5 V
1.4
2.4
3
2.9
mA
Ci
Control inputs
4.5 V
to 5.5 V
3
10
10
10
pF
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
TA = 25
°
C
MIN
0
SN54HCT646
MIN
0
SN74HCT646
MIN
0
UNIT
MAX
MAX
MAX
fl
fclock
Clock frequency
4.5 V
31
22
27
MHz
5.5 V
0
36
0
24
0
29
tw
Pulse duration CLKBA or CLKAB high or low
Pulse duration, CLKBA or CLKAB high or low
4.5 V
16
23
19
ns
5.5 V
14
21
17
tsu
Set p time A before CLKAB
Setup time, A before CLKAB
↑
or B before CLKBA
↑
4.5 V
20
30
25
ns
5.5 V
18
27
23
th
Hold time A after CLKAB
Hold time, A after CLKAB
↑
or B after CLKBA
↑
4.5 V
5.5 V
5
5
5
5
5
5
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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