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參數(shù)資料
| 型號(hào)： | SN54HCT574 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Octal Positive-Edge-Triggered D-Type Flip-Flops(八上升沿D觸發(fā)器(三態(tài)同相輸出)) |
| 中文描述： | 八路上升沿觸發(fā)D型正反器（八上升沿?觸發(fā)器（三態(tài)同相輸出）） |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 156K |
| 代理商： | SN54HCT574 |
SN54HCT574, SN74HCT574
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCLS177B – MARCH 1984 – REVISED JULY 1996
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions
SN54HCT574
MIN
NOM
SN74HCT574
MIN
NOM
UNIT
MAX
MAX
VCC
VIH
VIL
VI
VO
tt
TA
Supply voltage
4.5
5
5.5
4.5
5
5.5
V
High-level input voltage
VCC = 4.5 V to 5.5 V
VCC = 4.5 V to 5.5 V
2
2
V
Low-level input voltage
0
0.8
0
0.8
V
Input voltage
0
VCC
VCC
500
0
VCC
VCC
500
V
Output voltage
0
0
V
Input transition (rise and fall) time
0
0
ns
°
C
Operating free-air temperature
–55
125
–40
85
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
TA = 25
°
C
TYP
4.499
SN54HCT574
MIN
4.4
SN74HCT574
MIN
4.4
UNIT
MIN
4.4
MAX
MAX
MAX
VOH
VI= VIHor VIL
IOH = –20
μ
A
IOH = –6 mA
IOL = 20
μ
A
IOL = 6 mA
4 5 V
4.5 V
V
3.98
4.3
3.7
3.84
VOL
VI= VIHor VIL
VI = VIH or VIL
4 5 V
4.5 V
0.001
0.1
0.1
0.1
V
0.17
±
0.1
±
0.01
0.26
±
100
±
0.5
0.4
0.33
±
1000
II
IOZ
ICC
VI = VCC or 0
VO = VCC or 0
VI = VCC or 0,
One input at 0.5 V or 2.4 V,
Other inputs at 0 or VCC
5.5 V
±
1000
±
10
160
nA
μ
A
μ
A
5.5 V
±
5
80
IO = 0
5.5 V
8
ICC
5.5 V
1.4
2.4
3
2.9
mA
Ci
4.5 V
to 5.5 V
3
10
10
10
pF
This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 or VCC.
timing requirements over recommended operating free-air temperature range (unless otherwise
noted)
VCC
TA = 25
°
C
MIN
0
SN54HCT574
MIN
0
SN74HCT574
MIN
0
UNIT
MAX
MAX
MAX
fclock
Clock frequency
4.5 V
30
20
24
MHz
5.5 V
0
33
0
22
0
27
tw
Pulse duration CLK high or low
Pulse duration, CLK high or low
4.5 V
16
24
20
ns
5.5 V
14
22
18
tsu
Setup time data before CLK
Setup time, data before CLK
↑
4.5 V
20
30
25
ns
5.5 V
17
27
23
th
Hold time data after CLK
Hold time, data after CLK
↑
4.5 V
5.5 V
5
5
5
5
5
5
ns
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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