參數(shù)資料
型號(hào): SN54HC10W
廠商: Texas Instruments, Inc.
英文描述: TRIPLE 3-INPUT POSITIVE-NAND GATES
中文描述: 三重3輸入陽(yáng)性與非門
文件頁(yè)數(shù): 1/5頁(yè)
文件大小: 76K
代理商: SN54HC10W
SN54HC10, SN74HC10
TRIPLE 3-INPUT POSITIVE-NAND GATES
SCLS083B – DECEMBER 1982 – REVISED MAY 1997
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Package Options Include Plastic
Small-Outline (D) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
description
These devices contain three independent 3-input
NAND gates. They perform the Boolean function
Y = A
B
C or Y = A + B + C in positive logic.
The SN54HC10 is characterized for operation
over the full military temperature range of –55
°
C
to 125
°
C. The SN74HC10 is characterized for
operation from –40
°
C to 85
°
C.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
C
H
H
H
L
L
X
X
H
X
L
X
H
X
X
L
H
logic symbol
1
1A
2
1B
1Y
12
13
1C
3
2A
5
2C
9
3A
2Y
6
10
3B
11
3C
3Y
8
&
4
2B
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the D, J, N, and W packages.
logic diagram (positive logic)
A
B
C
Y
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1A
1B
2A
2B
2C
2Y
GND
V
CC
1C
1Y
3C
3B
3A
3Y
SN54HC10 . . . J OR W PACKAGE
SN74HC10 . . . D OR N PACKAGE
(TOP VIEW)
3
2 1 20 19
9 10 11 12 13
4
5
6
7
8
18
17
16
15
14
1Y
NC
3C
NC
3B
2A
NC
2B
NC
2C
1
1
N
3
3
V
1
2
G
N
SN54HC10 . . . FK PACKAGE
(TOP VIEW)
NC – No internal connection
Copyright
1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
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