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| 型號： | SN54GTL16622AHV |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVERS |
| 中文描述： | 18位LVTTL-TO-GTL/GTL總線收發(fā)器 |
| 文件頁數(shù)： | 1/10頁 |
| 文件大?。?/td> | 163K |
| 代理商： | SN54GTL16622AHV |
SN54GTL16622A, SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS
SCBS673D – AUGUST 1996 – REVISED DECEMBER 1999
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Members of the Texas Instruments
Widebus
Family
D-Type Flip-Flops With Qualified Storage
Enable
Translate Between GTL/GTL+ Signal Levels
and LVTTL Logic Levels
Support Mixed-Mode (3.3 V and 5 V) Signal
Operation on A-Port and Control Inputs
I
off
Supports Partial-Power-Down Mode
Operation
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors on A Port
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Distributed V
CC
and GND-Pin Configuration
Minimizes High-Speed Noise
Package Options Include Plastic Thin
Shrink Small-Outline (DGG) and Ceramic
Quad Flat (HV) Packages
description
The
registered
LVTTL-to-GTL/GTL+ and GTL/GTL+-to-LVTTL
signal-level translation. They are partitioned as
two separate 9-bit transceivers with individual
clock-enable controls and contain D-type
flip-flops for temporary storage of data flowing in
either direction. The devices provide an interface
between cards operating at LVTTL logic levels
and a backplane operating at GTL/GTL+ signal
levels. Higher speed operation is a direct result of
the reduced output swing (
<
1 V), reduced input
threshold levels, and output edge control
(OEC
).
’GTL16622A
bus
devices
are
that
18-bit
provide
transceivers
The user has the flexibility of using this device at either GTL (V
TT
= 1.2 V and V
REF
= 0.8 V) or the preferred
higher noise margin GTL+ (V
TT
= 1.5 V and V
REF
= 1 V) signal levels. GTL+ is the Texas Instruments derivative
of the Gunning transceiver logic (GTL) JEDEC standard JESD 8-3. The B port normally operates at GTL or
GTL+ signal levels, while the A-port and control inputs are compatible with LVTTL logic levels and are 5-V
tolerant. V
REF
is the reference input voltage for the B port.
Copyright
1999, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OEC and Widebus are trademarks of Texas Instruments Incorporated.
SN74GTL16622A . . . DGG PACKAGE
(TOP VIEW)
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OEAB
1A1
GND
1A2
1A3
GND
V
CC
1A4
GND
1A5
1A6
GND
1A7
1A8
GND
1A9
2A1
GND
2A2
2A3
GND
2A4
2A5
GND
2A6
V
CC
GND
2A7
2A8
GND
2A9
OEBA
CLKAB
1CEAB
1CEBA
1B1
GND
1B2
1B3
V
CC
1B4
1B5
1B6
GND
1B7
1B8
GND
1B9
2B1
GND
2B2
2B3
GND
2B4
2B5
2B6
V
REF
2B7
2B8
GND
2B9
2CEBA
2CEAB
CLKBA
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
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相關代理商/技術參數(shù) |
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| SN54H00AJ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| SN54H00BWA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54H00W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| SN54H00WA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54H00XW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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