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參數(shù)資料
| 型號： | SN54GTL16622A |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT LVTTL-TO-GTL/GTL BUS TRANSCEIVERS |
| 中文描述： | 18位LVTTL-TO-GTL/GTL總線收發(fā)器 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 163K |
| 代理商： | SN54GTL16622A |
SN54GTL16622A, SN74GTL16622A
18-BIT LVTTL-TO-GTL/GTL+ BUS TRANSCEIVERS
SCBS673D – AUGUST 1996 – REVISED DECEMBER 1999
7
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
timing requirements over recommended ranges of supply voltage and operating free-air
temperature for GTL (unless otherwise noted)
SN54GTL16622A
MIN
SN74GTL16622A
MIN
UNIT
MAX
MAX
fclock
tw
Clock frequency
200
200
MHz
Pulse duration, CLK high or low
2.5
2.5
ns
tsu
Setup time
Data before CLK
↑
CE before CLK
↑
Data after CLK
↑
CE after CLK
↑
2.5
2.1
ns
3.5
3.3
th
Hold time
0.3
0.3
ns
0.3
0
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature for GTL (see Figure 1)
PARAMETER
FROM
(INPUT)
TO
SN54GTL16622A
TYP
SN74GTL16622A
TYP
UNIT
(OUTPUT)
MIN
MAX
MIN
MAX
fmax
tPLH
tPHL
tdis
ten
Slew rate
200
200
MHz
CLKAB
B
2.4
5.7
2.5
5.5
ns
2.1
5.7
2.2
5.5
OEAB
B
1.6
5
1.7
4.8
ns
2.1
5.5
2.2
5.2
Both transitions (B port)
0.5
0.5
V/ns
tr
tf
tPLH
tPHL
ten
tdis
Transition time, B outputs (0.6 V to 1 V)
0.5
2.3
0.6
2.2
ns
Transition time, B outputs (1 V to 0.6 V)
0.3
1.7
0.4
1.5
ns
CLKBA
A
1.9
5.5
2.1
5.3
ns
1.8
5.3
2.1
5
OEBA
A
1.6
5.3
1.7
5
ns
2
5.8
2.3
5.5
All typical values are at VCC = 3.3 V, TA = 25
°
C.
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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