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參數(shù)資料
| 型號(hào)： | SN54GTL16612AWD |
| 廠(chǎng)商： | Texas Instruments, Inc. |
| 英文描述： | 18-BIT LVTTL-TO-GTL UNIVERSAL BUS TRANSCEIVERS |
| 中文描述： | 18位LVTTL到通用的GTL總線(xiàn)收發(fā)器 |
| 文件頁(yè)數(shù)： | 1/15頁(yè) |
| 文件大?。?/td> | 261K |
| 代理商： | SN54GTL16612AWD |
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FEATURES
Members of the Texas Instruments Widebus
Family
Universal Bus Transceiver (UBT) Combines
D-Type Latches and D-Type Flip-Flops for
Operation in Transparent, Latched, Clocked,
or Clock-Enabled Modes
Translate Between GTL/GTL+ Signal Levels
and LVTTL Logic Levels
Support Mixed-Mode (3.3-V and 5-V) Signal
Operation on A-Port and Control Inputs
B-Port Transition Time Optimized for
Distributed Backplane Loads
I
off
Supports Partial-Power-Down Mode
Operation
DESCRIPTION
The 'GTL16612A devices are 18-bit universal bus transceivers (UBT) that provide LVTTL-to-GTL+ and
GTL+-to-LVTTL signal-level translation. They allow for transparent, latched, clocked, or clock-enabled modes of
data transfer. These devices provide a high-speed interface between cards operating at LVTTL logic levels and
backplanes operating at GTL+ signal levels. High-speed (about two times faster than standard LVTTL or TTL)
backplane operation is a direct result of the reduced output swing (<1 V), reduced input threshold levels, and
output edge control (OEC). Improved GTL+ OEC circuits minimize bus settling time and have been designed
and tested using several backplane models.
Drvr
V
TT
Conn.
0.25”
0.875”
0.625”
0.625”
1”
1”
Slot 1
Slot 2
V
TT
0.625”
0.625”
1”
1”
Slot 16
Slot 8
0.25”
R
T
Conn.
Conn.
Conn.
Rcvr
Rcvr
Rcvr
R
T
V
t Time ns
10
30
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0
20
TI GTL16612A
Fairchild GTLP16612
TI GTL16612
SN54GTL16612A, SN74GTL16612A
18-BIT LVTTL-TO-GTL+ UNIVERSAL BUS TRANSCEIVERS
SCES187D–JANUARY 1999–REVISED JULY 2005
Bus Hold on A-Port Inputs Eliminates the
Need for External Pullup/Pulldown Resistors
Distributed V
CC
and GND-Pin Configuration
Minimizes High-Speed Switching Noise
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Package Options Include Plastic Shrink
Small-Outline (DL), Thin Shrink Small-Outline
(DGG), and Ceramic Flat (WD) Packages
xxx
Figure 1 shows actual device output waveforms using a synchronous clock at 75 MHz. The test backplane is a
16-slot, 14-inch board with loaded impedance of 33
. V
is 1.5 V, V
is 1 V, and R
pullup resistor is 50
.
The driver is in slot 8, with receivers in alternate slots 1, 3, 5, 7, 10, 12, 14, and 16. Receiver slot-1 signals are
shown. The signal becomes progressively worse as the receiver moves closer to the driver or the spacing
between receiver cards is reduced. The clock is independent of the data, and the system clock frequency is
limited by the backplane flight time to about 80-90 MHz. This frequency can be increased even more (30% to
40%) if the clock is generated and transmitted together with the data from the driver card (source synchronous).
Figure 1. Test Backplane Model With Output Waveform Results
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus, UBT, OEC, TI are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright 1999–2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
相關(guān)PDF資料 |
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| SN54GTL16612A | Planar E Core |
| SN74GTL16612ADGG | 18-BIT LVTTL-TO-GTL UNIVERSAL BUS TRANSCEIVERS |
| SN54GTL16622 | 18-Bit LVTTL-TO-GTL/GTL Transceivers(18位LVTTL-TO-GTL/GTL+收發(fā)器) |
| SN74GTL16622 | 18-Bit LVTTL-TO-GTL/GTL Transceivers(18位LVTTL-TO-GTL/GTL+收發(fā)器) |
| SN54GTL16921 | 20-Bit Flip-Flops(GTL I/O Level)(20位觸發(fā)器(GTL I/O 電平)) |
相關(guān)代理商/技術(shù)參數(shù) |
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| SN54H00AJ | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| SN54H00BWA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54H00W | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| SN54H00WA | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| SN54H00XW | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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